Senior FPGA/CPLD Architect - Data Center Hardware

Celestica

Penang

Sur place

MYR 70 000 - 100 000

Plein temps

14 jours+

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Résumé du poste

Celestica in Penang is seeking an FPGA/CPLD Engineer to enhance data center solutions through the design and implementation of FPGA/CPLD solutions. The ideal candidate should have a Bachelor's or Master's degree in Computer Science or Electrical Engineering and significant experience (10+ years for BSEE or 5+ years for MSEE) in FPGA/CPLD technologies. Key responsibilities include collaborating with cross-functional teams, performing design validations, and mentoring junior staff, with proficiency in Verilog and various debugging tools. This position does not allow remote work.

Qualifications

  • 10+ years of FPGA/CPLD experience with BSEE or 5+ years with MSEE.
  • In-depth knowledge of Verilog, SystemVerilog, and RTL design.
  • Proficient in using hardware debugging tools.

Responsabilités

  • Design, implement, and validate FPGA/CPLD solutions for data center systems.
  • Collaborate with hardware and software teams to meet integration requirements.
  • Provide mentoring and technical guidance to junior engineers.

Connaissances

Verilog
SystemVerilog
FPGA/CPLD design tools (Vivado, Quartus, ModelSim)
high-speed serial protocols (PCIe, USB, Ethernet, DDR, LVDS)
problem-solving skills
communication skills
Interpersonal skills

Formation

Bachelor's or Master's in Computer Science or Electrical Engineering

Outils

Oscilloscopes
Multimeters
Logic analyzers

Description du poste

Celestica in Penang is seeking an FPGA/CPLD Engineer to enhance data center solutions through the design and implementation of FPGA/CPLD solutions. The ideal candidate should have a Bachelor's or Master's degree in Computer Science or Electrical Engineering and significant experience (10+ years for BSEE or 5+ years for MSEE) in FPGA/CPLD technologies. Key responsibilities include collaborating with cross-functional teams, performing design validations, and mentoring junior staff, with proficiency in Verilog and various debugging tools. This position does not allow remote work.
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