Senior FPGA/CPLD Architect for Data Center Platforms

Celestica Inc.; George Town; On-site; MYR 180,000 - 240,000; Full time

Job summary

Celestica is hiring a Senior Hardware Design Engineer (FPGA/CPLD) to design and validate FPGA/CPLD based solutions for data center platforms in Malaysia. You will define architecture, write RTL, run simulations, and review schematic/PCB designs while coordinating with cross-functional teams.

You will optimize designs to meet system requirements, mentor junior engineers, and contribute to project schedules and reliability improvements in a collaborative environment.

Qualifications

• Bachelor or Master in Computer Science, Electrical Engineering or related field.
• Experience with FPGA/CPLD design, Verilog and SystemVerilog.
• Familiar with FPGA tools (Vivado, ISE, Quartus, ModelSim, etc.).
• Knowledge of PCIe/USB/Ethernet/DDR/LVDS high-speed protocols.
• Excellent problem solving and debugging skills.

Responsibilities

• Define FPGA/CPLD architecture and RTL design.
• Write RTL code, run simulations and verify designs.
• Collaborate with hardware and software teams for integration.
• Lead back-end design flow: timing, constraints, floorplan, validation.
• Mentor junior engineers and provide technical guidance.

Skills

RTL design

Verilog/SystemVerilog

FPGA/CPLD

debugging hardware

oscilloscopes/bench tests

communication skills

Education

Bachelors/Masters in EE/CS/related

Tools

Xilinx

Intel(Altera) FPGA

Lattice FPGA/FPGA tools

Job description

Celestica is hiring a Senior Hardware Design Engineer (FPGA/CPLD) to design and validate FPGA/CPLD based solutions for data center platforms in Malaysia. You will define architecture, write RTL, run simulations, and review schematic/PCB designs while coordinating with cross-functional teams.

You will optimize designs to meet system requirements, mentor junior engineers, and contribute to project schedules and reliability improvements in a collaborative environment.