Senior Design Verification Engineer (IP)

Lattice Semiconductor

George Town

Presencial

MYR 120.000 - 200.000

Jornada completa

Hace 8 días

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Descripción de la vacante

Lattice Semiconductor is seeking a senior Design Verification Engineer to join the RnD organization. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn and grow.

We require hands-on experience with SystemVerilog and UVM, plus the ability to develop constrained-random verification environments for complex IPs. Collaboration across design, validation and applications teams is essential.

Formación

  • 5+ years hands-on Design Verification using SV and UVM.
  • Experience building constrained-random verification environments.
  • Strong debugging, analytical and problem-solving skills.
  • Excellent cross-functional communication and teamwork.

Responsabilidades

  • Develop and review comprehensive test plans from design specs.
  • Create scalable UVM-based verification environments for complex IPs.
  • Develop test cases, sequences, scoreboards and assertions.
  • Analyze failures and perform root-cause debugging across teams.
  • Collaborate with design, architecture, validation and apps teams.
  • Contribute to verification methodology improvements and automation.

Conocimientos

Debugging
Analytical thinking
Communication
Teamwork

Educación

BS in Electrical Engineering
MS in Electronics Engineering
PhD in Electrical/Computer Engineering

Herramientas

SystemVerilog
UVM
Python
Tcl
Perl
C/C++
Verilog
FPGA

Descripción del empleo

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description:

Job Summary:

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation and customer service, and to that focus we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Lattice Semiconductor is seeking a senior Design Verification Engineer to join the RnD organization. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn and grow.

Responsibilities & Skills:

We are seeking a Senior IP DV engineer with significant hands‑on experience in pre‑silicon Design verification, verification methodologies and UVM.

  • Develop and Review Comprehensive Test Plan based on design specification
  • Develop, and maintain scalable UVM‑based constrained‑random verification environments for complex IPs
  • Create test cases, sequences, scoreboards, checkers, and assertions based on testplan and drive verification execution from planning through coverage closure and sign‑off.
  • Analyze failures and perform root‑cause debugging of design and verification issues.
  • Collaborate closely with design, architecture, system validation, and application teams to resolve functional and performance issues and customer escapes.
  • Contribute to verification methodology improvements, automation initiatives, and best practices across the team.

Requirements:

  • Good understanding of verification process from test plan through coverage closure and sign‑off
  • Hands‑on experience with SystemVerilog and UVM verification methodologies.
  • Experience developing constrained‑random verification environments for complex digital designs.
  • Strong debugging, analytical, and problem‑solving skills.
  • Excellent communication and teamwork skills in a cross‑functional and geographically distributed environment.
  • Strong communication and Analytical skills
  • Good understanding of HDL (Verilog, SystemVerilog)
  • Experience with designing with FPGA is a plus
  • Proficiency in at least one scripting or programming language such as Python, Tcl, Perl, or C/C++.
  • Experience in one or more of the following areas is highly desirable: High speed Interface Protocols (Ethernet, PCIe, CPRI or JESD204B/C, USB), Memory (DRAM, SRAM, Flash, DMA), Interconnect (AMBA AXI, AHB, APB), Peripherals (SPI, I2C or I3C)

Education and General:

  • BS/MS/PhD in Electrical Engineering, Electronics Engineering, Computer Engineering
  • 5+ years of hands‑on Design Verification experience using SystemVerilog and UVM.
  • Independent, self‑motivated, and capable of delivering results in a dynamic environment with evolving priorities.

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service‑driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.

Lattice

Feel the energy.

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

Malaysia

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service‑driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.

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