Senior Design Verification Engineer

Lattice Malaysia; Malaysia; On-site; MYR 180,000 - 260,000; Full time

Job summary

Lattice Semiconductor Malaysia is seeking an experienced verification engineer to lead FPGA/ASIC verification across complex IPs and SoCs. You will design scalable SystemVerilog/UVM environments, drive coverage goals, and mentor junior engineers in a fast-paced team focused on innovation and quality.

Responsibilities include sign-off activities, debugging across RTL to system-level tests, and close collaboration with design, firmware, and validation teams to ensure successful silicon tape-out.

Qualifications

• 5+ years of ASIC/FPGA functional verification experience.
• Strong SystemVerilog and UVM expertise.
• Experience building verification environments with drivers, monitors, scoreboards, and coverage.

Responsibilities

• Lead verification of FPGA/ASIC IPs, subsystems, and SoC features from spec to tape-out.
• Develop verification strategies, test plans, and closure criteria.
• Architect and build SystemVerilog/UVM environments, checkers, assertions, and coverage models.
• Drive constrained-random and directed verification for coverage goals.
• Debug design/testbench/simulation across RTL, GLS, low-power, and system-level scopes.
• Collaborate with architects, design, firmware, and validation teams.
• Lead verification sign-off: coverage closure, regression analysis, risk assessment.
• Mentor junior verification engineers and improve reusable infrastructure.
• Support silicon bring-up and root-cause analysis when required.

Skills

SystemVerilog

UVM

Python

Perl

Shell scripting

Debugging

Education

Bachelor's or Master's in Electrical/Electronic Engineering or Computer Engineering

Tools

Simulators

Verification tools

Job description

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description: Responsibilities

• Lead verification of complex FPGA/ASIC IPs, subsystems, and SoC features from specification through tape-out.
• Develop verification strategies, test plans, and verification closure criteria aligned with product requirements.
• Architect and develop scalable SystemVerilog/UVM-based verification environments, checkers, assertions, scoreboards, and coverage models.
• Drive constrained-random and directed verification to achieve functional and code coverage goals.
• Debug design, testbench, simulation, and integration issues across RTL, GLS, low-power, and system-level verification environments.
• Collaborate closely with architects, design engineers, firmware engineers, and validation teams to ensure successful project execution.
• Drive verification sign-off activities, including coverage closure, regression analysis, and risk assessment.
• Mentor junior verification engineers and contribute to verification methodology improvements and reusable infrastructure.
• Support silicon bring-up and root-cause analysis when required.

Required Qualifications

• Bachelor's or Master's degree in Electrical/Electronic Engineering, Computer Engineering, or a related field.
• 5+ years of experience in ASIC/FPGA functional verification.
• Strong expertise in SystemVerilog and UVM.
• Experience developing verification environments including drivers, monitors, scoreboards, assertions, and coverage models.
• Strong debugging skills across RTL, gate-level, and system-level simulations.
• Experience with industry-standard simulators and verification tools.
• Strong scripting skills in Python, Perl, Shell, or equivalent.

Preferred Qualifications

• Experience with PCIe, USB, MIPI CSI/DSI, Ethernet, SerDes, or other high-speed protocols.
• Experience with low-power verification methodologies (UPF/CPF).
• Experience with GLS, timing analysis, and post-silicon debug.
• Knowledge of FPGA architecture and programmable logic devices.
• Prior experience leading verification activities for a major IP or subsystem.
• Experience mentoring engineers and driving methodology improvements.

Additional Information

This position requires a successful background and reference checks and satisfactory proof of your right to work in: Malaysia. Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry.

Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable leader. For over 40 years, Lattice has driven innovation in the semiconductor industry. Our compact, power-efficient field programmable gate arrays (FPGAs) are essential to building a secure, intelligent, and connected world. Lattice is the #1 supplier of small FPGAs worldwide, with the largest installed base in the industry. Our solutions are trusted by over 11,000 customers globally, spanning the compute, communications, industrial, and embedded markets.

Founded in 1983 in Oregon’s Silicon Forest, Lattice has grown into a global leader with a passionate team dedicated to pushing the boundaries of programmable logic and fostering a culture of innovation. Headquartered in Portland, Oregon with major operations in San Jose, California, Shanghai, China, and Manilla, Philippines.

For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS.

At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace.

Applications are welcome from all qualified candidates.

At Lattice, our core values aren’t just something we look for in candidates – they’re something we actively cultivate and live by every day.

GROWTH We foster a culture where everyone strives for continuous learning and development. We challenge ourselves to boldly deliver exceptional growth and value for customers and shareholders.

RELIABILITY Our customers trust us to deliver, and we take that responsibility seriously. By committing ourselves to dependable supply, support, and solutions, we build strong collaboration that lasts and thrives.

EXECUTION Innovation turns great ideas into results. Together, we create differentiated products and solutions through disciplined planning, decisiveness, and timely delivery with uncompromising quality.

ACCOUNTABILITY We own our actions and outcomes: holding ourselves to the highest standards, agilely adapting to change, delivering on our commitments, and empowering each other to drive our success.

TRANSPARENCY Openness builds trust. We lead with integrity and candor, facing hard facts and embracing tough conversations with clear communication, decisive action, and open honesty at each level.

Lattice is strengthening its leadership in compute, communications, industrial, and embedded markets – underscored by multiple award wins that recognize its innovation, leadership, workplace culture, and collaboration-driven solutions.