Senior Design Verification Engineer

Lattice Semiconductor; George Town; On-site; MYR 180,000 - 240,000; Full time

Job summary

Lattice Semiconductor is seeking an experienced verification engineer in Malaysia (Penang) to lead verification of complex FPGA/ASIC IPs and SoCs. You will design scalable SystemVerilog/UVM environments, drive coverage, and collaborate with architects and firmware teams to ensure project success.

The role requires strong SystemVerilog/UVM expertise, 5+ years in ASIC/FPGA verification, and experience with industry-standard simulators.

Qualifications

• Bachelor's or Master's degree in Electrical/Electronic Engineering, Computer Engineering, or a related field.
• 5+ years of experience in ASIC/FPGA functional verification.
• Strong expertise in SystemVerilog and UVM.
• Experience developing verification environments including drivers, monitors, scoreboards, assertions, and coverage models.
• Strong debugging skills across RTL, gate-level, and system-level simulations.
• Experience with industry-standard simulators and verification tools.
• Strong scripting skills in Python, Perl, Shell, or equivalent.

Responsibilities

• Lead verification of complex FPGA/ASIC IPs, subsystems, and SoC features from specification through tape-out.
• Develop verification strategies, test plans, and verification closure criteria aligned with product requirements.
• Architect and develop scalable SystemVerilog/UVM-based verification environments, checkers, assertions, scoreboards, and coverage models.
• Drive constrained-random and directed verification to achieve functional and code coverage goals.
• Debug design, testbench, simulation, and integration issues across RTL, GLS, low-power, and system-level verification environments.
• Collaborate closely with architects, design engineers, firmware engineers, and validation teams to ensure successful project execution.
• Drive verification sign-off activities, including coverage closure, regression analysis, and risk assessment.
• Mentor junior verification engineers and contribute to verification methodology improvements and reusable infrastructure.
• Support silicon bring-up and root-cause analysis when required.

Skills

SystemVerilog

UVM

Python scripting

RTL debugging

Verification envs

Education

Bachelor's or Master's degree in Electrical/Electronic Engineering, Computer Engineering, or a related field

Tools

ModelSim

VCS

Xcelium

Job description

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a "team first" organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for.

Responsibilities

Job Description:

• Lead verification of complex FPGA/ASIC IPs, subsystems, and SoC features from specification through tape-out.


• Develop verification strategies, test plans, and verification closure criteria aligned with product requirements.


• Architect and develop scalable SystemVerilog/UVM-based verification environments, checkers, assertions, scoreboards, and coverage models.


• Drive constrained-random and directed verification to achieve functional and code coverage goals.


• Debug design, testbench, simulation, and integration issues across RTL, GLS, low-power, and system-level verification environments.


• Collaborate closely with architects, design engineers, firmware engineers, and validation teams to ensure successful project execution.


• Drive verification sign-off activities, including coverage closure, regression analysis, and risk assessment.


• Mentor junior verification engineers and contribute to verification methodology improvements and reusable infrastructure.


• Support silicon bring-up and root-cause analysis when required.

Required Qualifications

• Bachelor's or Master's degree in Electrical/Electronic Engineering, Computer Engineering, or a related field.


• 5+ years of experience in ASIC/FPGA functional verification.


• Strong expertise in SystemVerilog and UVM.


• Experience developing verification environments including drivers, monitors, scoreboards, assertions, and coverage models.


• Strong debugging skills across RTL, gate-level, and system-level simulations.


• Experience with industry-standard simulators and verification tools.


• Strong scripting skills in Python, Perl, Shell, or equivalent.

Preferred Qualifications

• Experience with PCIe, USB, MIPI CSI/DSI, Ethernet, SerDes, or other high-speed protocols.


• Experience with low-power verification methodologies (UPF/CPF).


• Experience with GLS, timing analysis, and post-silicon debug.


• Knowledge of FPGA architecture and programmable logic devices.


• Prior experience leading verification activities for a major IP or subsystem.


• Experience mentoring engineers and driving methodology improvements.

Additional Information

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

Malaysia

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.