SOC Frontend Integration Engineer

754 Altera Semiconductor Technology (M) Sdn. Bhd.; George Town; On-site; MYR 80,000 - 120,000; Full time

Job summary

754 Altera Semiconductor Technology (M) Sdn. Bhd. is seeking an energetic SoC Frontend Integration Engineer to lead RTL integration for complex System-on-Chip designs. This position requires collaboration across various teams, ensuring the quality and scalability of SoC designs.

The ideal candidate must have a degree in Electrical/Computer Engineering, experience with RTL design, and strong problem-solving skills. Knowledge in AI/ML for SoC integration is advantageous. The job is based in Penang, Malaysia.

Qualifications

• Bachelor’s or Master’s degree in relevant fields.
• Experience with RTL design and integration using Verilog/SystemVerilog.
• Knowledge of various RTL quality checks such as Lint.

Responsibilities

• Construct SoC frontend RTL integration with internal and third-party IPs.
• Own SoC top-level RTL, hierarchy, and connectivity strategies.
• Drive SoC-level frontend quality checks.

Skills

RTL design and integration using Verilog/SystemVerilog

Various RTL quality checks (Lint, CDC/RDC)

Linux environment scripting (Perl, Python, Tcl, Shell)

Debugging and problem-solving skills

Cross-functional communication skills

AI/ML SoC knowledge

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field

Job description

Job Summary

We are looking for an energetic & experienced SoC Frontend Integration Engineer to be part of our growing team to drive the frontend integration of complex System-on-Chip (SoC) FPGA designs. In this role, you will own top-level SoC RTL integration and drive quality, scalability, and robustness across multiple IPs and subsystems. You will work cross-functionally with architecture, IP design, verification, reliability, timing/power, physical design, and post-silicon teams, playing a critical role in taking SoCs from concept to tapeout.

Key Responsibilities

• Construct SoC frontend RTL integration, assembling internal and third-party IPs into top-level SoC designs
• Own SoC top-level RTL, hierarchy, connectivity, and scalability strategy
• Drive SoC-level frontend quality checks and closure
• Partner closely with verification teams to enable SoC-level simulation, emulation, and regression environments
• Collaborate closely with software team to enable integration of SoC into Quartus
• Provide high-quality frontend handoff to various SoC teams to enable other checkout processes such as physical integration, timing/power convergence, pinout development, and reliability assessments
• Debug and resolve complex integration issues across RTL, verification, and downstream flows
• Review IP deliverables and influence interfaces, clocking, reset, and power requirements
• Promote SoC integration best practices
• Continuously improve SoC integration flows, automation, and documentation

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
• Experience with RTL design and integration using Verilog/SystemVerilog
• Knowledge of various RTL quality checks such as Lint, CDC/RDC, logical verification compile, and emulation
• Solid understanding of SoC architectures and IP-based design methodologies
• Experience running and debugging frontend quality checks (lint, CDC, RDC)
• Comfortable working in a Linux environment and using scripting languages (Perl, Python, Tcl, or Shell)
• Strong debugging, problem‑solving, and cross‑functional communication skills
• Knowledge in AI/ML SoC to improve productivity in SoC Integration is advantageous

Job Details

Job Type: Regular
Shift: Shift 1 (Malaysia)
Primary Location: Penang 15, Penang, Malaysia
Additional Locations: Posting Statement

Equal Employment Opportunity

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.