Lead ATE Test Engineer – Silicon Bring-up & Validation

UST; Penang; On-site; MYR 60,000 - 90,000; Full time

Job summary

UST is seeking an experienced hardware test engineer to develop and maintain ATE test programs and patterns. You will collaborate with IP design teams to validate test content during silicon bring-up and characterize silicon across diverse conditions.

The role requires strong programming/scripting skills (C, C++, Java, Python, etc.), familiarity with version control, and knowledge of JTAG/BIST/HSIO. Windows/Linux/Unix experience is expected.

Qualifications

• Hands-on experience developing ATE test programs and patterns.
• Experience with Advantest 93K platforms preferred.
• Understanding of JTAG, BIST, HSIO concepts.
• Strong programming/scripting in C/C++, Java, Ruby, Perl, or Python.
• Familiarity with version control systems.
• Experience in Windows, Unix, and Linux environments.
• Solid understanding of modern computer architecture.

Responsibilities

• Partner with IP design/test teams to develop and validate test patterns.
• Build and maintain test program infrastructure using Best Known Methods.
• Evaluate new product features and test content during silicon bring-up.
• Characterize silicon across process, voltage, and temperature.
• Correlate and release test programs for high-volume production.
• Lead initiatives to reduce test time, debug yield issues, and improve quality.
• Support product qualification and assist in debugging customer returns.

Skills

C

C++

Java

Ruby

Perl

Python

JTAG

BIST

HSIO

Version control

Tools

Advantest 93K

Job description

UST is seeking an experienced hardware test engineer to develop and maintain ATE test programs and patterns. You will collaborate with IP design teams to validate test content during silicon bring-up and characterize silicon across diverse conditions.

The role requires strong programming/scripting skills (C, C++, Java, Python, etc.), familiarity with version control, and knowledge of JTAG/BIST/HSIO. Windows/Linux/Unix experience is expected.