FPGA / RTL Design Engineer

Thundersoft; Penang; On-site; MYR 60,000 - 90,000; Full time

Job summary

Thundersoft in Penang, Malaysia, seeks an FPGA/RTL Design Engineer to support RTL development, verification, FPGA implementation, and hardware bring-up. The ideal candidate has hands-on experience with Verilog/SystemVerilog, RTL design, and FPGA debugging.

You will collaborate across teams to translate requirements into implementable designs, perform FPGA bring-up on SoC platforms, and verify RTL in simulation and on hardware. Strong problem solving and independence are valued.

Qualifications

• 2+ years of RTL design experience in FPGA or ASIC development.
• Proficiency in Verilog and/or SystemVerilog.
• Hands-on experience with RTL simulation, FPGA debugging, or hardware bring-up.
• Experience with scripting languages such as Python, Perl, Tcl, or Bash.
• Familiarity with SoC integration and hardware validation is an advantage.
• Strong problem-solving, communication, and cross-functional collaboration skills.
• Self-motivated, with the ability to independently manage tasks and deliver results.

Responsibilities

• Collaborate with cross-functional teams to define technical requirements and resolve FPGA design challenges.
• Design, implement, and verify RTL designs in simulation environments.
• Perform FPGA implementation, platform bring-up, and hardware debugging.
• Debug FPGA platforms integrated with SoC systems and validate RTL functionality on hardware.
• Translate product requirements into technical implementations and maintain relevant design documentation.
• Drive technical tasks independently from design through verification and debugging.

Skills

RTL Design

Verilog/SystemVerilog

FPGA Debugging

Python/Scripting

SoC Integration

Job description

We are looking for an FPGA / RTL Design Engineer to support RTL development, verification, FPGA implementation, and hardware bring-up. The ideal candidate has hands-on experience in Verilog/SystemVerilog, RTL design, and FPGA debugging.

Key Responsibilities

• Collaborate with cross-functional teams to define technical requirements and resolve FPGA design challenges.
• Design, implement, and verify RTL designs in simulation environments.
• Perform FPGA implementation, platform bring-up, and hardware debugging.
• Debug FPGA platforms integrated with SoC systems and validate RTL functionality on hardware.
• Translate product requirements into technical implementations and maintain relevant design documentation.
• Drive technical tasks independently from design through verification and debugging.

Key Requirements

• 2+ years of RTL design experience in FPGA or ASIC development.
• Proficiency in Verilog and/or SystemVerilog.
• Hands-on experience with RTL simulation, FPGA debugging, or hardware bring-up.
• Experience with scripting languages such as Python, Perl, Tcl, or Bash.
• Familiarity with SoC integration and hardware validation is an advantage.
• Strong problem-solving, communication, and cross-functional collaboration skills.
• Self-motivated, with the ability to independently manage tasks and deliver results.

Key Skills

FPGA, RTL Design, Verilog, SystemVerilog, ASIC Design, RTL Verification, FPGA Debugging, FPGA Bring-up, RTL Simulation, SoC Integration, Hardware Validation, Python, Perl, Tcl, Bash