Entry-Level E-Core CPU Physical Design Engineer

Intel Corporation

George Town

Hybrid

MYR 100,000 - 160,000

Full time

14 days+

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Job summary

Intel Corporation in Malaysia (Penang) seeks a highly capable engineer to design CPU Core blocks, from synthesis through post-layout verification and tapeout. You will develop constraints for synthesis and APR tools, working with micro-architecture, RTL, and circuit teams to meet aggressive timing and power goals.

The role emphasizes strong problem solving, communication, and teamwork, with responsibilities spanning synthesis, floorplanning, power reduction, and script writing in a

Qualifications

  • Bachelor of Engineering or Master of Science in Electronic, Electrical or Computer Engineering, or equivalent.
  • Undergrad student pursuing Bachelor of Engineering or Master of Science in Electronic, Electrical or Computer Engineering, or equivalent may apply.

Responsibilities

  • Logic synthesis and place and route for CORE IP blocks.
  • Perform floor-planning and routing studies and implementation; block/sub-system timing analysis.
  • Work on low power techniques and power reduction in sub-system.
  • Physical verification closure of block/sub-system.
  • Write scripts for data analysis and recipe creation.
  • Collaborate with micro-architecture, RTL, and circuit teams to meet targets.

Skills

Strong analytic skills
Problem solving
Communication skills
Team work

Education

Bachelor/Master in Electronic, Electrical or Computer Engineering
Undergrad student in E.E./C.E.

Tools

Synthesis tools
Auto-Place and Route (APR) tools

Job description

Intel Corporation in Malaysia (Penang) seeks a highly capable engineer to design CPU Core blocks, from synthesis through post-layout verification and tapeout. You will develop constraints for synthesis and APR tools, working with micro-architecture, RTL, and circuit teams to meet aggressive timing and power goals.

The role emphasizes strong problem solving, communication, and teamwork, with responsibilities spanning synthesis, floorplanning, power reduction, and script writing in a

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