Design Verification Engineer

AMD; Penang; On-site; MYR 100,000 - 150,000; Full time

Job summary

A leading technology company in Malaysia is seeking an experienced engineer for roles in digital design and verification for next-generation processors powering various devices. Candidates should have expertise in ASIC/SOC design flows and proficiency in Verilog and UVM, along with strong analytical and problem-solving skills. The position emphasizes collaboration with teams across different locations, making excellent communication essential. A Master’s degree with relevant experience is preferred.

Qualifications

• 5+ years experience with a Master's degree, or 7+ years with a Bachelor's.
• Advanced knowledge of ASIC/SOC design and verification flow.
• Familiarity with high-speed protocols (USB, PCIE, etc.) is a plus.

Responsibilities

• Collaborate with design teams to define verification requirements.
• Own functional verification from initial planning to closure.
• Implement test benches using object-oriented programming verification techniques.

Skills

Analytical skills

Problem-solving skills

Communication skills

Team collaboration

Education

Master's Degree in EE, CS or related

Bachelor's with 7+ years experience

Tools

Verilog

System Verilog

UVM

Job description

Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation. Own or be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure, while providing technical leadership to the team.

Own verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification. Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology.

PREFERRED EXPERIENCE:

• Advanced knowledge of ASIC/SOC Design flow and state of the art verification flow
• Proficient with Verilog, System Verilog and UVM.
• Familiarity with power aware simulation and firmware/hardware co-verification is a plus
• Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus
• Familiarity with industry protocols such as ACPI, GPIO, CLK, UART/DMA, SPI/eSPI, I2C/I3C is a plus
• Familiarity with industry standard high-speed protocols such as memory protocols, USB and PCIE is a plus.
• Strong analytical and problem-solving skills with pronounced attention to detail.
• Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality.

ACADEMIC CREDENTIALS:

Major in EE, CS or related, Master’s Degree with 5+ years or Bachelor’s with 7+ years working experiences.