Atom CPU Layout Design Engineer – High-Perf VLSI

Intel Corporation

Penang

Hybrid

MYR 120,000 - 180,000

Full time

11 days ago
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Benefits offered by this job

Hybrid work model

Job summary

Intel Corporation in Penang is seeking an experienced E-Core (Atom) CPU Layout Design Engineer to drive the physical implementation of memory compilers, custom IP blocks, and layout partitions for future Intel Atom CPUs.

The role requires collaborating with circuit designers and CAD teams, delivering full design hierarchy, and aligning across SoC groups. A strong background in VLSI/CMOS, 3+ years of layout experience, and scripting skills are essential.

Qualifications

  • Bachelor's or Master's degree in Electronic/Microelectronic Engineering, Computer Engineering, or a related engineering discipline.
  • 3+ years of experience in layout design.
  • Familiarity with VLSI and CMOS logic circuit design.
  • Proficient in UNIX shell scripting, TCL, and Perl.

Responsibilities

  • Independently assess and drive complex digital physical design assignments across multiple design stages.
  • Work closely with circuit design engineers to interpret schematics and drive physical implementation.
  • Collaborate with CAD teams to debug tools and verify design correctness.
  • Build and verify physical design hierarchy from cell layout to top-level integration.
  • Partner with SoC teams to ensure alignment and reuse across projects.

Skills

UNIX shell scripting
TCL
Perl
CMOS design
VLSI
Analytical thinking
Problem solving

Education

Bachelor's or Master's in Electronic/Microelectronic Engineering or Computer Engineering

Tools

UNIX shell
TCL
Perl

Job description

Intel Corporation in Penang is seeking an experienced E-Core (Atom) CPU Layout Design Engineer to drive the physical implementation of memory compilers, custom IP blocks, and layout partitions for future Intel Atom CPUs.

The role requires collaborating with circuit designers and CAD teams, delivering full design hierarchy, and aligning across SoC groups. A strong background in VLSI/CMOS, 3+ years of layout experience, and scripting skills are essential.

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