Analog Mixed Signal (AMS) Layout Design Engineer

UST Malaysia; Bayan Lepas; On-site; MYR 120,000 - 180,000; Full time

Job summary

UST Malaysia is seeking an experienced layout engineer to lead the layout design of digital, analog, and mixed-signal ICs. You will collaborate closely with circuit designers to meet performance targets and drive layout schedules, resources, and deliverables.

The role requires 4+ years in analog/mixed-signal IC layout, strong proficiency with Cadence Virtuoso and Mentor Graphics, and a deep understanding of layout sensitivities.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or related field.
• 4+ years of experience in analog/mixed-signal IC layout design.
• Expert proficiency with Cadence Virtuoso and Mentor Graphics.
• Deep understanding of transistor-level and analog layout sensitivities (matching, parasitics, noise, shielding).
• Strong problem-solving skills and attention to detail.
• Excellent communication and cross-functional collaboration.
• Experience mentoring and leading layout teams is a plus.

Responsibilities

• Lead and execute layout design of digital, analog and mixed-signal circuits.
• Collaborate with circuit designers to understand requirements and targets.
• Plan and manage layout schedules, resources and deliverables.
• Perform floorplanning, placement and routing optimizing area and performance.
• Conduct DRC, LVS, ERC checks including RV.
• Drive design reviews and mentor junior engineers.
• Interface with foundry partners to ensure process rule compliance.
• Document design methodology and layout guidelines for future projects.

Skills

Layout design

Analog/mixed-signal

Problem-solving

Communication

Leadership/mentoring

Education

Bachelors or Masters in Electrical Engineering or Microelectronics

Tools

Cadence Virtuoso

Mentor Graphics

Job description

• Lead and execute layout design of digital, analog and mixed-signal circuit.
• Collaborate closely with circuit designers to understand requirements, constraints, and performance targets.
• Plan and manage layout schedules, resources, and deliverables, ensuring timely completion of projects.
• Perform floorplanning, placement, and routing while optimizing for area, performance, and manufacturability.
• Conduct thorough physical verification such as DRC, LVS, ERC including RV.
• Drive design reviews and provide technical mentorship to junior layout engineers.
• Interface with foundry partners to ensure compliance with process design rules and manufacturing best practices.
• Document design methodology and maintain layout guidelines for future projects.

Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or related field.
• 4+ years of experience in analog/mixed-signal IC layout design.
• Expert proficiency with industry-standard EDA tools (e.g., Cadence Virtuoso, Mentor Graphics).
• Deep understanding of transistor level and analog circuit topologies and their layout sensitivities (matching, parasitics, noise, shielding, etc.).
• Strong problem-solving skills and attention to detail.
• Excellent communication skills and ability to work collaboratively in a cross‑functional environment.
• Experience mentoring and leading layout teams is a plus.