SVE Validation framework and QA Engineer

North American Production Sharing, Inc.

Tijuana

Presencial

MXN 420.000 - 780.000

Jornada completa

hace 13 horas
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Descripción de la vacante

North American Production Sharing, Inc. is seeking a SVE Validation framework and QA Developer Engineer up to Staff level.

The role focuses on porting existing features and building new capabilities for the SVE bare metal framework, enabling global teams to validate HW products with automated QA workflows. You will manage QA planning, release and debug tasks to keep the validation environment current across Emulation and Post-Si setups.

Formación

  • Bachelor’s/Master’s degree in Computer and/or Electrical Engineering or related field.

Responsabilidades

  • Design, develop, and debug system/IP validation framework for bare-metal and light-weight RTOS environments.
  • Establish QA process cadence for internal and external consumption and participate in framework/debug cycles.
  • Integrate available SVE drivers/content to meet QA goals for release quality and stability.
  • Develop/port/ enhance system validation content for system level and low power use cases.
  • Interface with Design/DV/SW teams to enable SVE test infrastructure on Emulation and Post-Si environments.

Conocimientos

Embedded SW
C/C++
JTAG
Kernel debugging
Source control
Code reviews
Build systems

Educación

B.S./M.S. in Computer or Electrical Engineering
PhD in Science/Engineering (optional)

Herramientas

Perforce
Git
SVN
GCC/CLANG/RVDS/LLVM
Makefiles

Descripción del empleo

SVE Validation framework and QA Engineer

Tipo de empleo: Permanent

Tipo jornada: Full-time

Fecha de publicación: 05-10-2026

Identificador oferta: 62597

About the Team

System Validation & Emulation (SVE) team is part of the central SoC validation organization responsible for ensuring end-to-end silicon quality across pre- and post-silicon phases .

This role focuses on content quality and system-level validation enablement , offering deep exposure to SoCs through bare-metal validation content , scalable automation frameworks and complex system debugs. Engineers in this role work across HW and SW boundaries to develop, validate, and scale system-level test content , ensuring high-quality silicon validation across a wide range of SoC domains.

Excellent Opportunity to work on cutting-edge SoCs across multiple product segments , including:
  • Premium mobile and flagship platforms
  • AI Accelerator platform
Role Summary :

SoC Validation Team (SVE – System Validation & Emulation) is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon. The validation team works closely with architects, designers, verification engineers, software engineers, and customers to solve the toughest issues spanning board design, SoC RTL, microcontroller firmware, OS/SW, and process variation. We are currently seeking candidates for the position of SVE Framework and QA Developer Engineer up to Staff level title.

In this position you will be porting existing and developing new features for the SVE bare metal framework and infrastructure enabling global teams to effectively validate various HW products. You will oversee and own the QA process planning and execution with various integration, release and debug responsibilities to ensure that SVE teams are enabled with the latest validation environment. If you are passionate about resolving tough technical problems, working with various global teams, and intrigued in constantly learning new technologies and applying them efficiently to your work, we ’ re looking for a candidate just like you!

Responsibilities
  • Design, develop, debug system/IP validation framework to be used in bare-metal and light-weight-RTOS environments for various SoC validation activities by global core teams
  • Through a standardized QA process, establish regular SVE test infra release cadence for both internal and external consumption, actively participate in the framework and content debugs to ensure project milestones are met
  • Work together with various core teams on integrating available SVE drivers and content to achieve common QA goals on release quality, stability and intent
  • Design and develop automated QA tools and new flows to ensure the build quality metrics are consistently met in day-to-day activities
  • Develop/port/enhance system validation content based e.g. on system level and low power use cases, find HW bugs and root cause them
  • Interface with various IP validation and cross functional teams (Design/DV/SW) to understand and debug complex issues, and to enable the SVE test infrastructure on Emulation and Post-Si environments
Mandatory Skills:
  • Good knowledge and understanding of Embedded SW architecture and content development in C/C++ for validation purposes
  • Exposure to broad range of SoC architecture concepts – interconnects, power management, inter-processor communication techniques, etc.
  • Experience using debug tools including JTAG and kernel debuggers like Lauterbach Trace32
  • Ability to use lab equipment for testing and validation, including logic analyzers and oscilloscopes
  • Source code management: proficient in source code management tools such as Perforce, Git , SVN, etc. Experience in branching, merging and resolving merge conflicts
  • Code Reviews: ability to conduct thorough and constructive code reviews to maintain code quality, ensure best practices and identify areas of improvement
  • In-depth understanding of software build toolchains comprising of compilers, Makefiles , linker/scatter files
    • Compiler/Linker: Proficient in using compilers and linkers such as GCC, CLANG, RVDS, LLVM; experience optimizing code to resolve linker issues
    • Makefiles : Strong understanding of the makefile syntax and usage; ability to create, modify and maintain Makefiles to automate the build process and manage dependencies effectively
Desired Skills
  • Knowledge of Operating systems/RTOS/Linux kernel internals, multithreading, scheduling policies, locking mechanism, Virtual memory, MMU, etc.
  • Understanding memory management techniques including weakly ordered memory model, pipelining of memory systems, memory barriers, etc.
  • Working knowledge of ARMv8/ARMv9/x86/RISC-V CPU architectures, Interrupt handling, Cache coherency, IO Coherency, and SoC architectures with complex SMP/ heterogenous cores
  • Understanding of mobile chip and/or server architecture (CPU, GPU, DDR, NOCs, Peripherals, etc.), and systematic debug and root-cause techniques of low-level SW/HW issues
  • HW-SW solution bring-up on FPGA/emulation platforms and on fresh SOC designs
  • Exposure to build automation tools such as Jenkins, and experience in creating automated processes to streamline the development process
  • Regression testing exposure: understanding the available methodologies and tools, ability to design, implement and execute comprehensive test suites for SW quality and stability
Requirements:
  • Bachelor ’ s/Master ’ s degree in Computer and/or Electrical Engineering or related field
  • 5+ years of hands-on silicon validation and embedded SW development experience on modern CPU and SoC architectures
  • Proficiency with C/C++ coding, and at least familiarity with assembly, VHDL/Verilog and various scripting languages like Python or Perl
  • Good written and spoken communication skills
Minimum Qualifications:
  • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
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