Senior Layout Engineer

NXP Semiconductors; Guadalajara; Presencial; USD 60,000 - 90,000; Jornada completa

Descripción de la vacante

A leading company in secure connectivity solutions is seeking a Senior Analog Layout Engineer in Guadalajara. The role involves advanced layout design and verification of integrated circuits, requiring strong technical skills and teamwork. Ideal candidates should have a master's or bachelor's in electrical engineering and relevant experience in analog layout design.

Formación

• Minimum 5 years experience (10 years for BSEE) in analog layout design.
• Familiar with CMOS, BCD processes, and power management products.
• Good communicator in both oral and written English.

Responsabilidades

• Perform layout and abstract design, verifying with DRC/LVS checks.
• Participate in physical design reviews.
• Deliver back-annotated data for timing verification.

Conocimientos

Leadership

Communication

Problem-Solving

Teamwork

Design Methodologies

Educación

MSEE or BSEE

Herramientas

Cadence Virtuoso

Calibre

Skill

Pearl

Descripción del empleo

NXP Semiconductors enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better and safer. As the world leader in secure connectivity solutions for embedded applications, we are driving innovation in the secure connected vehicle, end-to-end security & privacy and smart connected solutions markets.

We are looking for a senior analog layout engineer.

• Layout and abstract design, physical topologies and design methodologies
• Verifying and completing the IC with DRC/LVS checks, chip-finishing and bonding.
• Participating in physical design reviews
• Delivering back-annotated data needed for timing verification of modules, both standalone and embedded in top level circuitry.
• Properly tagging of IC layout data bases
• Work with other team members to build up design knowledge and improve way of working;
• Develop his/her leadership on his/her domain of skills and actions

• MSEE or BSEE
• Minimum of5 years (10 years for BSEE) experience for analog layout design

• Familiar with Cadence back-end design tools: Virtuoso etc.
• Familiar with Calibre
• Familiar with Skill, Pearl and other script languages
• Familiar with CMOS, BCD processes and power management products layout design
• Able to establish good relationships with a multi-disciplinary development team, international customers and subcontractors
• Creative thinker with helicopter view, capable of finding an appropriate solution to complex problems
• Good communicator in both oral and written English

• Team player, able to work in a cross-functional-team environment

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