NCG Pathfinding Design Layout Engineer

Micron Technology, Inc; Tlaquepaque; Presencial; MXN 867.002 - 1.213.802; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Medical, dental and vision plans

Paid family leave

Paid time-off program

Paid holidays

Descripción de la vacante

Micron Technology, Inc in Guadalajara, Mexico is seeking a Layout Design Engineer to join its DDR Team. The role involves collaborating with global engineering teams on layout design and verification.

The ideal candidate should hold a degree in Electronics with knowledge of analog layout fundamentals. Micron offers comprehensive benefits including medical, dental, and a robust paid time-off program.

Formación

• No more than 2 years of graduation.
• Ability to understand design constraints and implement high-quality layouts.
• Knowledge of critical analog and mixed-signal layout verification.

Responsabilidades

• Responsible for design and development of critical layouts.
• Communicate effectively with global engineering teams.
• Perform layout verification and quality checks.

Conocimientos

Analog Layout fundamentals

Problem-solving skills

Educación

Bachelor / master's degree in Electronics or related

Herramientas

Cadence VLE/VXL

Mentor Graphic Calibre DRC/LVS

Descripción del empleo

Req ID: JR93760 – NCG Pathfinding Design Layout Engineer

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.

We are looking for a Layout Design Engineer at our Micron Technology’s DDR Team in Guadalajara, Mexico. As a Layout Design Engineer, you will be collaborating with peer teams across Micron’s global footprint, in a multiple projects‐based environment.

Responsibilities

• Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support.
• Perform layout verification like LVS/DRC/Antenna, quality check and documentation.
• Responsible for on-time delivery of block-level layouts with acceptable quality.
• Effectively communicating with Global engineering teams to assure the success of layout project.

Minimum Qualification

• Bachelor / master's degree in Electronics or related (no more than 2 years of graduated)
• Knowledge of Analog Layout fundamentals (e.g., Matching, Electro‑migration, Latch‑up, coupling, crosstalk, IR‑drop, active and passive parasitic devices, etc.)
• Ability to understand design constraints and implement high‑quality layouts.

Preferred qualifications

• Excellent command and problem‑solving skills in physical verification of custom layout.
• Knowledge in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS.
• Understanding layout effects on the circuit such as speed, capacitance, power and area, etc.

Layout/Mask Designer E3 – Relocation Level: TBD

Micron offers a comprehensive benefits program designed to support your physical and mental well‑being. Our benefits include medical, dental and vision plans available at all locations, income protection programs, paid family leave, a robust paid time‑off program and paid holidays. For additional information regarding the benefit programs available, please see the Benefit Guide posted on Benefits | Micron Technology, Inc.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.