Junior ASIC Layout Engineer (Hybrid)

Semtech; Aguascalientes; Hybrid; MXN 201.000 - 335.000; Vollzeit

Zusammenfassung

Semtech is seeking an ASIC/Layout Design Engineer 1 to perform basic physical design and layout activities, supporting layout development and assisting with verification in our semiconductor environment.

The role requires fundamental understanding of layout principles, attention to detail, and collaboration with design teams to ensure proper placement, routing, and DFM checks across manufacturing processes.

Qualifikationen

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related technical field.
• 0–2 years of ASIC layout or physical design experience.
• Basic knowledge of semiconductor layout principles.
• Experience with EDA tools and design environments.
• Familiarity with IC layout verification preferred.

Aufgaben

• Support physical layout of standard cells, memory blocks, and basic circuit elements.
• Assist with layout implementation from schematics and specifications.
• Help with placement and routing of components and interconnects.
• Support floorplanning and power distribution network development.
• Maintain layout documentation and design files.
• Assist with DRC and LVS verification.
• Document verification results and issue resolutions.
• Prepare layout data for manufacturing and DFM checks.
• Assist with tape-out activities and data transfer.
• Maintain design databases and version control.

Kenntnisse

ASIC physical design

Layout

Schematic-to-layout understanding

Attention to detail

Reading design specs

Ausbildung

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related technical field

Tools

EDA tools

Layout verification software

Jobbeschreibung

Semtech is seeking an ASIC/Layout Design Engineer 1 to perform basic physical design and layout activities, supporting layout development and assisting with verification in our semiconductor environment.

The role requires fundamental understanding of layout principles, attention to detail, and collaboration with design teams to ensure proper placement, routing, and DFM checks across manufacturing processes.