Hybrid SoC Power & PDN Validation Engineer

Intel Corporation

Región Centro

Hybrid

MXN 600,000 - 840,000

Full time

8 days ago

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Benefits offered by this job

Hybrid work model
12-month assignment

Job summary

Intel Corporation in Mexico (Guadalajara) is seeking an SoC Power Thermal Performance Validation and Optimization Engineer for a 12-month contract. The role focuses on validating power delivery, thermal, and performance at the SoC level, with collaboration across architecture, firmware, software, and layout teams.

The ideal candidate will develop validation methodologies, optimize hardware/software solutions, and perform SoC-level debugging to address power, thermal, and performance challenges.

Qualifications

  • Bachelor’s degree in Electronics, Electrical, Computer Engineering, or related field.
  • 1+ years of experience in SoC power and performance validation and/or digital logic and optimization.
  • 1+ years of experience developing/optimizing power/performance KPIs and/or circuit design trade-offs.
  • Intermediate to advanced English level.
  • Must have unrestricted, permanent right to work in Mexico.

Responsibilities

  • Develop and execute SoC-level power delivery, PDN, and IR/EM metric validation and optimization.
  • Collaborate with cross-functional teams to ensure power delivery meets targets and specifications.
  • Configure data loggers and analyze power/thermal data to support hardware/software optimizations.
  • Produce validation reports and drive improvements to validation strategies and processes.

Skills

Power integrity
SoC validation
Python scripting
JTAG debugging
PDN analysis

Education

Bachelor's in Electronics/EE

Tools

Oscilloscope
Logic analyzer
Data loggers

Job description

Intel Corporation in Mexico (Guadalajara) is seeking an SoC Power Thermal Performance Validation and Optimization Engineer for a 12-month contract. The role focuses on validating power delivery, thermal, and performance at the SoC level, with collaboration across architecture, firmware, software, and layout teams.

The ideal candidate will develop validation methodologies, optimize hardware/software solutions, and perform SoC-level debugging to address power, thermal, and performance challenges.

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