DFT CAD Engineer

Job Description

Join the CAD team at Qualcomm and advance the industry state of the art for DFT. Support the company-wide deployment of flows architected to enable leading process nodes. Work closely with cross-functional teams from design, production test and yield analysis.

Responsibilities

• Will be part of DFTCAD automation team, developing methodology and flows to support end-2-end DFT/DFX solution, and provide support and training.
• Collaborate with SoC design, product and test engineer teams to drive standardization of DFT/ATPG methodology and flow across the company.
• Work closely with multiple EDA tool vendors to resolve day-to-day issues, helping to drive vendor solutions.
• Collect and evaluate requirements with consideration of improving design flow efficiency, test quality, and lower test cost to improve DFT flow and methodology.

Qualifications

• 3+ years of experience in DFT/DFD/DFX, MS or PhD degree in EE or related field, or equivalent experience.
• Core DFT skills for this position include: scan insertion, Memory BIST implementation, JTAG/IJTAG, at-speed test, ATPG, fault simulation, silicon diagnostic, scan compression, IDL/PDL, SSN, SEQ, Core-based test methodology and IO wrapping, pattern retargeting.
• Experience developing automation for DFT flow and architecting the DFT methodology.
• Strong coding experience with hands-on experience using TCL, Python/Perl, Scripting, and strong analytical debug and problem-solving skills.
• Good exposure to industrial DFT tools including Siemens, Synopsys or equivalent.
• Deep understanding of SoC design, low power, timing exceptions, and complex clock structures.
• Strong analytical and debugging experience for ATPG DRC, product manufacturing pattern failures, and Design for Debug concept and implementation.
• Excellent team spirit, strong ownership and openness, highly motivated.