Staff Physical Design Engineer: Mixed-Signal ASIC

Renesas; Sicilia; On-site; EUR 44,000 - 59,000; Full time

Job summary

Renesas Electronics is seeking a Physical Design Engineer to join the Analog Backend team in Italy. You will work on the digital island implementation within our analog chips, tackling complex physical design challenges in mixed-signal environments.

Responsibilities include floorplanning, placement, CTS, routing, and verification, plus power integrity analysis across voltage domains. You will collaborate with global teams of analog designers and verification engineers, contributing to

Qualifications

• Experience in ASIC Physical Design.
• Knowledge of floorplanning, placement, CTS, routing, and sign-off checks.
• Knowledge of power integrity analysis (IR drop and electromigration).
• A team player who enjoys working in an international, collaborative environment.
• Analog layout experience is a plus.

Responsibilities

• Implement ASIC physical design flow: floorplanning, placement, CTS, routing, physical verification.
• Optimize designs for performance, reliability, manufacturability.
• Perform chip-level power integrity analysis across multiple voltage domains (IR drop, EM).
• Work on digital implementation embedded in analog environments.
• Collaborate with analog designers and verification engineers in a global team.

Skills

ASIC PD

Floorplanning

Placement

CTS

Routing

Sign-off checks

Power integrity

IR drop

Electromigration

Team player

Collaboration

Analog layout

Job description

Renesas Electronics is seeking a Physical Design Engineer to join the Analog Backend team in Italy. You will work on the digital island implementation within our analog chips, tackling complex physical design challenges in mixed-signal environments.

Responsibilities include floorplanning, placement, CTS, routing, and verification, plus power integrity analysis across voltage domains. You will collaborate with global teams of analog designers and verification engineers, contributing to