Staff Layout Engineer

AMD; Milano; In loco; EUR 65.000 - 95.000; Tempo pieno

Descrizione del lavoro

AMD is seeking an experience analog/mixed-signal layout design engineer to join the SerDes Technology Group in Milano. You will develop high-speed SerDes layouts for CPU/GPU silicon, working with remote teams across time zones.

The role emphasizes collaboration, problem solving, and quality in physical design. You will participate in floor-planning, PDK flows, and post-layout analyses, contributing to the overall layout methodology and productivity improvements.

Competenze

• Good understanding of analog and mixed signal layout fundamentals, IR, EM, self and coupling capacitances, RC delay and self-heating.
• Strong in high speed signal routing and shielding.
• Experience with LVS/DRC/ERC/ANT/ESD verifications.
• Familiarity with IC manufacturing processes and design flows.
• Experience with high-speed SerDes blocks and PLLs in advanced Fin-FET processes.
• Experience with digital on-top integration flow or digital SOC flow is a plus.

Mansioni

• Layout design of high speed SerDes analog mixed signal circuits per project requirements and specs.
• Block level physical implementation including floor-planning, power distribution, clock and signal routing, analog layout.
• Post-layout circuit performance analysis participation.
• Participation in block/IP/chip level integration activities.
• Estimate schedules and report progress.
• Contribute to layout methodology and flow development.
• Drive layout productivity improvements and automation.
• Supervise layout resources and address quality issues with design teams.

Conoscenze

High speed layout

Analog/mixed-signal layout

Team collaboration

Communication skills

Problem solving

Layout methodology

Formazione

Bachelors or Masters in Computer/ Electrical Engineering

Strumenti

Cadence SKILL

Python

Perl

Tcl

Descrizione del lavoro

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

STAFF LAYOUT DESIGN ENGINEER

THE ROLE:

The AMD SerDesTechnology Group develops high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS process. We are currently seeking an experience analog/mixed-signal layout design engineer to join ourworld-class team in the development of SerDes solutions to facilitate the future connectivity of AMD CPU and GPU products.

THE PERSON:

You have a passion for high speed layout design with innovative and creative ideas to solve complex design challenges. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills, and are willing to learn, and ready to take on problems.

KEY RESPONSIBILITIES:

• Layout design of high speed and high performance SerDes analog mixed signal circuit in accordance to project requirements and specifications.
• Block level physical implementation which includes floor-planning, power distribution network, clock and signal routing, analog and mixed signal transistor level layout.
• Participate in post-layout circuit performance analysis.
• Participate in block/IP/chip level integration activities.
• Estimate realistic schedule, track and report clear progress and status.
• Strong participation in defining layout methodology and flow.
• Driving layout productivity improvement initiatives (i.e., pcell development and automation).
• Other responsibilities which include supervision of layout resources (onsite and offsite), assessing and correcting layout quality issues, and providing feedback to design teams.

PREFERRED EXPERIENCE:

• Good understanding of analog and mixed signal layout fundamentals, IR, EM, self and coupling capacitances, RC delay and self-heating.
• Good understanding of high speed critical signal routing and shielding.
• Strong in physical design verifications (LVS/DRC/ERC/ANT/ESD/etc.).
• Familiarity with circuit design concepts/flows and IC manufacturing processes.
• Experience in layout of high-speed SerDes blocks and PLLs in advanced Fin-FET process is a plus.
• Experience with digital on top integration flow or digital SOC flow is a benefit.
• Experience with Cadence SKILL and other programming is a benefit (Perl, Python, Tcl, etc.).
• Ability to work closely with the remote & different time zones design teams.
• Excellent team player and good communication skills.

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in Computer Engineering/Electrical Engineering.

#LI-PL1

#LI-REMOTE

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.