Staff Engineer, Design Verification

Analog Devices; Milano; In loco; EUR 80.000 - 110.000; Tempo pieno

Descrizione del lavoro

Analog Devices, Milan-based, seeks a Staff Design Verification Engineer to verify complex mixed and digital ICs and lead sub‑system verification efforts in the Data Center and Energy group. The role entails ownership of verification plans, environments, and feature verification across multiple projects.

You will work with digital blocks, high‑speed interfaces, and DSP data‑paths, employing SystemVerilog/UVM, constrained random verification, and coverage-driven techniques while mentoring junior

Competenze

• Bachelor's or Master’s degree in Electronics Engineering.
• 8+ years of experience in digital design, with at least 3 years in digital verification.
• Expertise in Verilog, SystemVerilog, UVM, object‑oriented programming, scripting, and automation with Perl or Python.

Mansioni

• Verification of sub-systems using leading‑edge verification methodologies.
• Experience with the development of verification plans and verification environments from scratch on multiple projects.
• Verification of blocks using System Verilog and UVM.
• Should have worked on scoreboard assertions, functional coverage, and formal verification, to reach verification goals
• Take complete ownership of a complex feature verification and mentor & guide junior verification engineers.
• Define and implement improvements in verification flow and methodology.
• Gate-level simulations and debugging at the sub‑system level.

Conoscenze

Verilog

SystemVerilog

UVM

Python

Perl

Automation

Constrained random verification

Debugging

Formazione

Electronics Engineering degree

Strumenti

PMBus

SPI

OTP/MTP

I2C

Descrizione del lavoro

Staff Engineer, Design verification Analog Devices

Milan, Lombardy, Italy

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at and on LinkedIn and Twitter (X).

Staff Design Verification Engineer

The Data Center and Energy group develops leading‑edge Power Conversion solutions for the Data Center. The group is seeking a Staff Verification Engineer who must have a proven track record of verifying complex mixed/digital signals ICs. The team handles verification of the products, which include digital signal processing data‑paths, high‑speed interfaces, and sub‑systems controllers. Candidate will work with the latest verification methodologies on designs ranging from individual blocks to sub‑system level verification.

Job Responsibilities

• Verification of sub-systems using leading‑edge verification methodologies.
• Experience with the development of verification plans and verification environments from scratch on multiple projects.
• Verification of blocks using System Verilog and UVM.
• Should have worked on scoreboard assertions, functional coverage, and formal verification, to reach verification goals
• Take complete ownership of a complex feature verification and mentor & guide junior verification engineers.
• Define and implement improvements in verification flow and methodology.
• Gate-level simulations and debugging at the sub‑system level.

Job Requirements

• Bachelor's or Master’s degree in Electronics Engineering with 8+ years of experience in digital design, of which at least 3 years in digital verification.
• Expertise in Verilog, System Verilog, UVM, object‑oriented programming, scripting, and automation with Perl or Python.
• Firm understanding of constrained random functional verification, coverage, and assertions.
• Expertise in test plan development and development of verification environments from the ground up.
• Extensive experience with verification of complex blocks, regressions, and coverage closure.
• Experience with gate-level simulations and debugging.
• Excellent debugging, analytical, and problem‑solving skills.
• Strong interpersonal, teamwork, and communication skills.
• Expected to be highly independent, proactive, and result‑oriented to achieve verification goals.

Preferred Qualifications

• Knowledge of PMBus, SPI, OTP/MTP, and I2C protocols.
• Experience in technically mentoring and coaching junior engineers.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

Required Travel: Yes, 10% of the time

Shift Type: 1st Shift/Days

Summary Location: Italy, Milan, Assago

Type: Full time