Staff Analog Design Engineer, Power Management

onsemi; Lombardia; On-site; EUR 42,000 - 52,000; Full time

Job summary

onsemi is seeking a Staff Analog Design Engineer for NEW PRODUCT DEVELOPMENT in Milan, Italy. You will contribute to the development of power management products including multiphase controllers, smart power FETs and DC-DC converters for consumer, industrial and automotive applications.

The role focuses on designing analog and mixed-signal blocks, performing extensive simulations, and collaborating across teams to refine specifications and architectures for next-generation power management ICs.

Qualifications

• BS in Electrical Engineering or related with 5 years of experience, or MS with 3 years of experience.
• Solid knowledge of EDA design tools and Cadence design environment.
• Deep understanding of power conversion architectures (Buck, Boost, LDOs, gate drivers).
• Experience with analog/mixed-signal blocks and layout considerations.

Responsibilities

• Design analog and mixed-signal blocks and chip top level.
• Perform comprehensive simulation coverage of circuits.
• Contribute to product definition, specification reviews, feasibility, and architecture.
• Assist with design schedule and die size estimation.
• Optimize circuit size and performance.
• Support post-silicon validation and debugging.
• Design, simulation, and verification of power converter ICs using state-of-the-art EDA tools.

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

Tools

Cadence design environment

Simplis

MATLAB

Cadence Spectre

Verilog-A/AMS

SystemVerilog

Job description

onsemi is seeking a Staff Analog Design Engineer for NEW PRODUCT DEVELOPMENT in Milan, Italy. You will contribute to the development of power management products including multiphase controllers, smart power FETs and DC-DC converters for consumer, industrial and automotive applications.

The role focuses on designing analog and mixed-signal blocks, performing extensive simulations, and collaborating across teams to refine specifications and architectures for next-generation power management ICs.