Senior SerDes & High-Speed PHY Validation Engineer

Xsight Labs; Trentino-Alto Adige; On-site; EUR 65,000 - 100,000; Full time

Job summary

Xsight Labs is seeking a Senior SerDes & High-Speed PHY Validation Engineer to lead validation for 112G PAM4 and future 224G technologies. You will own test plans, perform advanced measurements, and collaborate across silicon, package, board, and system teams to drive product readiness.

The role emphasizes lab ownership, automation, and data-driven investigations, with opportunities to influence next-generation Ethernet PHY designs.

Qualifications

• Deep experience in SerDes and PHY validation in high-speed systems.
• Hands-on experience with PAM4-based communication systems.
• Strong understanding of BER, jitter, and equalization techniques.

Responsibilities

• Lead end-to-end validation of SerDes and PHY solutions across silicon, package, board, and system environments.
• Define validation strategies for 112G PAM4 and 224G technologies.
• Develop characterization methodologies for performance, robustness, and margins.
• Support silicon bring-up and root-cause analysis of complex issues.
• Perform advanced high-speed measurements (eye diagrams, bathtub curves, RJ/DJ/TJ).
• Document results and present findings to stakeholders.

Skills

SerDes validation

Signal integrity

PAM4 signaling

BER/margin analysis

Jitter analysis

Automation with Python

Linux environment

Education

B.Sc. or M.Sc. in Electrical Engineering

Tools

Keysight validation platforms

Oscilloscopes

BERTs

VNAs

Job description

About the Role

We are looking for a highly motivated Senior SerDes & High-Speed PHY Validation Engineer to play a key role in validating next-generation high-speed connectivity solutions for cloud, AI, and data center networking systems.

In this role, you will lead the validation and characterization of advanced Ethernet SerDes technologies spanning 112G PAM4 and next-generation 224G PHY architectures. You will work at the intersection of silicon design, signal integrity, system engineering, and validation, driving complex technical investigations from first silicon bring-up through compliance and product readiness.

This opportunity is ideal for engineers who enjoy combining deep signal integrity knowledge, hands-on lab ownership, automation development, and cross-functional technical leadership to solve challenging high-speed design and validation problems.

What You'll Do

Lead SerDes Validation and Characterization

• Drive end-to-end validation of high-speed Ethernet SerDes and PHY solutions across silicon, package, board, and system environments.
• Define and execute validation strategies for 112G PAM4 and next-generation 224G technologies.
• Develop characterization methodologies to assess performance, robustness, and design margins across operating conditions.
• Support silicon bring-up activities and root-cause analysis of complex system-level issues.

Execute Advanced High-Speed Measurements

Perform and analyze:

• Eye-diagram measurements
• BER and margin analysis
• Bathtub curve characterization
• Jitter decomposition (RJ, DJ, TJ)
• CTLE and DFE performance evaluation
• TX FIR optimization
• Channel loss and equalization analysis

Debug Complex Signal Integrity Challenges

Investigate and resolve performance limitations across:

• Silicon
• Package
• PCB channels
• Connectors
• Cables
• End-to-end system interconnects

Work closely with design and architecture teams to translate lab findings into actionable design improvements.

Validation Automation

• Work with existing validation and data-analysis frameworks to improve test efficiency, repeatability, and coverage.
• Contribute to automation solutions that streamline test execution, data collection, analysis, and reporting.
• Collaborate with team members to enhance lab productivity and accelerate debug cycles.

Work with Industry-Leading Test Platforms

Configure and operate advanced Keysight validation equipment, including:

• BERTs
• High-speed oscilloscopes
• Channel emulators
• Vector network analyzers (VNAs)

Influence Next-Generation Products

• Partner closely with SerDes, PHY, SI/PI, package, board, and system design teams.
• Contribute to validation methodologies that will be used across future product generations.
• Provide technical recommendations that directly influence product performance and customer success.

Drive Standards Compliance

Execute compliance and interoperability testing according to industry standards, including:

• IEEE 802.3cd, 802.3ck, and emerging IEEE P802.3dj Ethernet specifications
• Ethernet compliance and interoperability test methodologies

Document and Communicate Results

• Produce clear validation plans, test reports, and technical recommendations.
• Present findings to engineering stakeholders and leadership teams.
• Drive issues to closure through data-driven analysis and collaboration.

Required Qualifications

• 5+ years of experience in SerDes validation, PHY validation, signal integrity, or related high-speed design environments.
• Hands‑on experience validating high-speed PAM4‑based communication systems.
• Strong understanding of:
• PAM4 signaling
• BER measurements and margining techniques
• Jitter analysis and decomposition
• Equalization techniques (CTLE, DFE, FFE)
• Channel loss and signal integrity fundamentals
• Experience operating high-speed lab equipment such as oscilloscopes, BERTs, VNAs, and related instrumentation.
• Strong automation and scripting skills using Python - advantage.
• Experience working in Linux environments - advantage.
• Ability to independently drive technical investigations and resolve complex validation issues.
• B.Sc. or M.Sc. in Electrical Engineering or a related field.

Preferred Qualifications

• Experience with 112G Ethernet SerDes validation.
• Experience with 224G SerDes technologies.
• Familiarity with Ethernet and relevant IEEE standards.
• Experience with compliance and interoperability testing.
• Experience using Keysight validation platforms and automation APIs.
• Experience with SQL‑based data analysis.
• Experience with first‑silicon bring-up and characterization.

Why Join Us?

Work on Technology That Matters

Help develop the high-speed connectivity technologies powering next-generation AI infrastructure, cloud‑scale networking systems, and hyperscale data centers.

Influence Product Direction

Your findings will directly impact silicon, PHY, package, and system‑level design decisions across multiple product generations.

Solve Cutting-Edge Technical Challenges

Work on some of the industry's most advanced Ethernet and SerDes technologies, including emerging 224G architectures and future high‑bandwidth interconnect solutions.

Join an Expert Team

Collaborate with experienced engineers across SerDes design, validation, signal integrity, systems, and architecture in a highly technical and innovation-driven environment.

Access World-Class Labs

Work with state‑of‑the‑art validation and measurement platforms to tackle the toughest high-speed networking challenges.