Principal Hs Digital Place & Route Engineer (D/M/F)

Appcast; Bardi; On-site; EUR 90,000 - 140,000; Full time

Job summary

ams OSRAM is seeking a Principal HS Digital Place & Route Engineer to lead high-speed digital physical implementation from synthesis through sign-off and tape-out, in a PCIe/SerDes rich environment, based in Pavia, Italy. You will define back-end flows, drive PPA targets, and mentor a team across multiple projects.

The role requires a PhD or MSc in Electrical Engineering with 10+ years in digital backend design, strong Cadence experience, and deep knowledge of floorplanning, routing, and timing

Qualifications

• MSc or PhD in Electrical Engineering, Microelectronics, or related field.
• 10+ years of experience in digital physical implementation and backend design.
• Proven expertise with industry-standard physical design tools and flows (Cadence EDA flow preferred).
• Strong knowledge of floorplanning, placement, CTS, routing, STA, physical verification, power integrity, and signal integrity analysis.
• Extensive experience with timing closure and sign-off methodologies.
• Experience with high-speed interfaces such as UCIe, PCIe, DDR, SerDes, USB, MIPI, or similar protocols is highly desirable.
• Experience driving methodology development and engineering best practices across multiple projects.
• Strong communication, collaboration, mentoring, and technical leadership skills.
• Ability to work independently and influence technical decisions at organizational level.

Responsibilities

• Lead place-and-route implementation from synthesis results through PnR to sign-off and tape-out.
• Define, deploy, and maintain digital backend methodologies, flows, and best practices.
• Drive timing closure, power, performance, and area (PPA) strategies.
• Mentor engineers within the digital backend community.
• Lead EDA tool evaluations, methodology improvements, and flow automation initiatives.
• Support technology enablement for advanced CMOS nodes including FinFET and FD-SOI.
• Provide technical leadership across multiple projects and business units.
• Act as interface to foundries, EDA vendors, and methodology teams.
• Drive continuous improvement of backend design efficiency and quality.

Job description

Technical expert and recognized authority for physical implementation of high-speed digital and mixed-signal ICs

Lead place-and-route implementation from synthesis results through PnR to sign-off and tape-out

Define, deploy, and maintain digital backend methodologies, flows, and best practices

Drive timing closure, power, performance, area (PPA), signal integrity, EM/IR and physical verification strategies

Mentor and develop engineers within the digital backend community

Lead EDA tool evaluations, methodology improvements, and flow automation initiatives

Support technology enablement for advanced CMOS nodes including FinFET and FD-SOI

Provide technical leadership across multiple projects and business units

Act as interface to foundries, EDA vendors, and methodology teams

Drive continuous improvement of backend design efficiency and quality

Who we are looking for

MSc or PhD in Electrical Engineering, Microelectronics, or related field

10+ years of experience in digital physical implementation and backend design

Proven expertise with industry-standard physical design tools and flows (Cadence EDA flow preferred)

Strong knowledge of floorplanning, placement, CTS, routing, STA, physical verification, power integrity, and signal integrity analysis

Extensive experience with timing closure and sign-off methodologies

Experience with high-speed interfaces such as UCIe, PCIe, DDR, SerDes, USB, MIPI, or similar protocols is highly desirable

Experience driving methodology development and engineering best practices across multiple projects

Strong communication, collaboration, mentoring, and technical leadership skills

Ability to work independently and influence technical decisions at organizational level

ams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities.

Principal HS Digital Place & Route Engineer (d/m/f) Pavia, Lombardy, Italy