NAND DFT Director: AI-Driven Test Architecture

Micron Technology, Inc.; Avezzano; Presencial; EUR 105.000 - 183.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Meal vouchers

Corporate welfare

Remote working days allowance

Supplementary health insurance

Life coverage

Employee Assistance Program

Descripción de la vacante

Micron Technology, Inc. seeks a Director of NAND Design for Test (DFT) to lead the global DFT strategy and execution for advanced NAND Flash products.

You will define the DFT vision, architecture, and roadmap, owning verification, coverage, and sign-off from early product definition through mass production while driving AI/ML-enabled test diagnostics and silicon learning at scale. The role requires deep semiconductor and DFT expertise, strong people leadership, and collaboration across Design,

Formación

• MS/PhD in Electrical Engineering or related field.
• Experience leading semiconductor design, DFT, product test; tape-out to mass production.
• Deep NAND design, DFT, test architecture, and silicon debugging knowledge.
• Proven people leadership in global teams and executive communication.
• Proficiency in Python and C/C++.

Responsabilidades

• Define global NAND DFT vision and roadmap.
• Own DFT architecture, verification, and design sign-off.
• Collaborate with Design, Product Eng, Test, and Manufacturing through silicon bring-up.
• Drive AI/ML adoption for DFT and diagnostics.
• Build and lead a distributed, international DFT organization.

Conocimientos

Leadership

Strategic planning

AI/ML for DFT

Python

C/C++

Cross-functional collaboration

Executive communication

Data analytics

Educación

MS/PhD in Electrical Engineering or related

Descripción del empleo

Micron Technology, Inc. seeks a Director of NAND Design for Test (DFT) to lead the global DFT strategy and execution for advanced NAND Flash products.

You will define the DFT vision, architecture, and roadmap, owning verification, coverage, and sign-off from early product definition through mass production while driving AI/ML-enabled test diagnostics and silicon learning at scale. The role requires deep semiconductor and DFT expertise, strong people leadership, and collaboration across Design,