Lead Analog Layout Engineer – Mixed-Signal ICs

NXP Semiconductors; Catania; In loco; EUR 61.000 - 84.000; Tempo pieno

Descrizione del lavoro

NXP Semiconductors is seeking a Principal Analog Layout Engineer to lead analog/mixed-signal layouts on custom-on-top and digital-on-top projects in Italy. You will be a hands-on designer and layout lead, collaborating with circuit and physical design teams from concept through tapeout.

Responsibilities include floorplanning, power routing, ESD implementation, DRC/LVS/ERC, and multi-domain integration. You will drive layout methodologies, assist in customer communication, and mentor junior

Competenze

• BSEE or MSEE.
• 10+ years of custom analog/mixed-signal layout experience in deep sub-micron CMOS.
• Expert in Cadence Virtuoso XL, Floorplanning, Constraint Driven Layout, and PVS DRC/LVS/ERC.
• Strong knowledge of matching, common centroid, shielding, EM/IR, high-speed routing, parasitics, and DFM practices.
• Proven experience leading analog-on-top and digital-on-top chip layouts.
• Experience with floorplanning, power distribution, ESD, and multiple voltage domains.
• Familiarity with PLL, OSC, ADC, DAC, LDO, Bandgap, and high-speed interface circuits.
• Excellent communication and cross-functional leadership skills.
• Fluent in English
• SKILL or Perl scripting is a plus.

Mansioni

• Develop and lead block-level and top-level analog/mixed-signal layouts.
• Drive floorplanning, power routing, ESD implementation, and chip integration.
• Run and debug DRC, LVS, ERC, and extraction flows.
• Collaborate with design, digital P&R, IO, ESD, package, test, and PDK teams.
• Provide layout schedules, technical leadership, and customer communication.
• Identify layout risks and drive resolution of design and PDK issues.
• Improve layout methodologies and automation.

Conoscenze

Cross-functional leadership

Analog/mixed-signal layout

Floorplanning

High-speed routing

Communication

Formazione

BSEE or MSEE

Strumenti

Cadence Virtuoso XL

Floorplanning tools

Constraint Driven Layout

PVS DRC/LVS/ERC

Perl scripting

Descrizione del lavoro

NXP Semiconductors is seeking a Principal Analog Layout Engineer to lead analog/mixed-signal layouts on custom-on-top and digital-on-top projects in Italy. You will be a hands-on designer and layout lead, collaborating with circuit and physical design teams from concept through tapeout.

Responsibilities include floorplanning, power routing, ESD implementation, DRC/LVS/ERC, and multi-domain integration. You will drive layout methodologies, assist in customer communication, and mentor junior