Analog Layout Intern for Power Management ICs (HPC)

Renesas; Sicilia; On-site; EUR 7,800 - 10,000; Part time

Job summary

Renesas is seeking a brilliant and motivated Bachelor student in Electronic for an internship to complete his/her Bachelor degree. The internship has a duration of six months to be spent in the new Renesas design center located in Catania, Italy.

Objective of the internship is to perform research and development in analog and mixed-signal circuit layout with a special focus on Power Management ICs and Smart Power Stages for High-Performance Computing.

Qualifications

• Bachelor student in Electronics (or related field) required.
• Basic electronic knowledge of CMOS and bipolar transistors, diodes, resistors, capacitors, inductors.
• Good written and spoken English.
• Familiarity with Cadence design environment is a plus.

Responsibilities

• Layout conception of analog and mixed-signal circuit blocks.
• Study all steps of layout conception from floor plan, routing, checks, extraction..
• Study different layout technics and learn to apply them accordingly (matching constraints, electromigration study, layout side effects)
• Familiarize with different tools dedicated to layout (Cadence, Calibre, VXL...)
• Ensure layout quality and compliance with specifications

Skills

Electronic basics

English proficiency

Cadence familiarity

Layout concepts

Education

Bachelor student in Electronics

Tools

Cadence tools

Calibre

VXL

Job description

Renesas is seeking a brilliant and motivated Bachelor student in Electronic for an internship to complete his/her Bachelor degree. The internship has a duration of six months to be spent in the new Renesas design center located in Catania, Italy.

Objective of the internship is to perform research and development in analog and mixed-signal circuit layout with a special focus on Power Management ICs and Smart Power Stages for High-Performance Computing.