Analog IC Design Intern — Isolated Gate Driver Thesis

Allegro MicroSystems

Milano

Sur place

EUR 6 696 - 11 160

Plein temps

14 jours+
Générateur de candidature

Une candidature conçue pour ce poste — un CV et une lettre de motivation personnalisés qui correspondent à l’offre.

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Avantages offerts par ce poste

Paid internship
Mentorship

Résumé du poste

Allegro MicroSystems in Milan is offering a paid Master’s thesis internship in analog IC design and power electronics, focused on isolated gate driver IP. You will design, simulate and develop IP under expert mentorship.

Join a global technology leader and contribute to high‑voltage power products, gaining hands‑on experience with Cadence Virtuoso/Spectre, SPICE and MATLAB, while collaborating with engineers at the Milan Design Center.

Qualifications

  • Pursuing a Master’s degree in Electronic Engineering with focus on Analog/Mixed-Signal IC Design or Power Electronics.
  • Strong academic foundation in analog circuit design and power semiconductor devices (MOSFETs, IGBTs, SiC/GaN).
  • Familiarity with simulation tools (Cadence Virtuoso/Spectre, SPICE, or MATLAB/Simulink).
  • Familiarity with the Linux environment.
  • Proficiency in written and spoken English.
  • Proactive, collaborative mindset with a passion for innovation.

Responsabilités

  • Design, simulate and develop IP for isolated gate drivers.
  • Research will impact design efficiency and accelerate HV power product development.
  • Integral part of the Milan Design Center, mentored by senior engineers.
  • Apply academic knowledge to a tangible, high impact project in a professional power electronics IC design environment.

Connaissances

Analog IC design
Power electronics
MOSFETs/IGBTs
Cadence Virtuoso
Cadence Spectre
Linux
English proficiency

Formation

Pursuing Master’s degree in Electronic Engineering (analog/mixed-signal / power electronics)

Outils

Cadence Virtuoso
Cadence Spectre
SPICE
MATLAB/Simulink

Description du poste

Allegro MicroSystems in Milan is offering a paid Master’s thesis internship in analog IC design and power electronics, focused on isolated gate driver IP. You will design, simulate and develop IP under expert mentorship.

Join a global technology leader and contribute to high‑voltage power products, gaining hands‑on experience with Cadence Virtuoso/Spectre, SPICE and MATLAB, while collaborating with engineers at the Milan Design Center.

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