Verification Engineer -2625

Sunrise Biztech Systems; Bengaluru; Vor Ort; INR 1.200.000 - 2.200.000; Vollzeit

Zusammenfassung

Sunrise Biztech Systems in Bengaluru is hiring a Verification Engineer to contribute to performance and functional verification of ASIC blocks/IP cores for CPU/GPU development. You will document test plans and work with a team of engineers to verify the design within the block, chip, and system context.

The role requires 3-6 years of verification experience, strong C/C++ in Linux, and proficiency in Verilog/SystemVerilog with debugging skills.

Qualifikationen

• 3-6 years of proven verification experience on large ASIC development projects or software/firmware in hardware development settings.
• Strong background in C/C++ development in a Linux environment.
• Proficient with Verilog/SystemVerilog and DPI/PLI; good analytical and debugging skills.

Aufgaben

• Participate in the performance/functional verification of ASICs/IP cores for CPU/GPU development.
• Collaborate with design and verification teams to verify functionality within block/chip/system context.
• Document and execute test plans with evolving verification methodologies.

Kenntnisse

UVM

SystemVerilog

C/C++

Linux

Debugging

Block/SS verification

Ausbildung

Bachelor's degree in Electrical/Computer Engineering

Tools

GDB

Valgrind

Perl

Makefiles

DPI/PLI

Jobbeschreibung

Urgent Hiring!!!

We are hiring for one of our reputed clients for the following position. If you're interested and your experience matches the requirement, we'd love to hear from you.

Position: Verification Engineer

Experience: 3 - 6 Years

Location: Bangalore

Full Time Employment/Contractual

Role & responsibilities

JOB DUTIES:

• Participate in the performance/functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort.
• Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system.
• Be responsible for carefully documenting and executing test plan(s).
• Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex IP designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects.
• Be familiar with hardware modeling and/or assertion-based verification methods.

Mandatory Skills Required

• UVM and SystemVerilog
• IP Verification and Functional Verification
• Test content development, Debug on Block and SS Level, and Root Cause Analysis
• Verification/UVM Testbench Development
• Good computer architecture knowledge

Nice to have:

• Performance verification
• GPU/Shader Architecture Understanding

Preferred candidate profile

• EXPERIENCE AND EDUCATION: 3-6 years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting;
• Strong background in C/C++ development in a Linux Environment;
• strong debug skills and experience with debug tools such as Gdb, Valgrind;Proficient in Object Oriented programming, STL, computer architecture and data structures;
• Knowledge of Perl and Makefiles;
• Experience in Verilog/SystemVerilog/preferred
• ;Experience in C/Verilog environment using DPI/PLI, preferred;Strong analytical skills and attention to detail;
• Excellent written and communication skills