Sykatiya Technologies - FPGA Design Engineer - VHDL/Verilog

Sykatiya Technologies Pvt Ltd; Bengaluru; On-site; INR 2,500,000 - 4,200,000; Full time

Job summary

Sykatiya Technologies Pvt Ltd is seeking an experienced FPGA Design Engineer in Bangalore to join the core hardware team and drive advanced FPGA solutions.

The role requires 7-8 years of hands-on FPGA design expertise, strong skills in Verilog and/or VHDL, and experience with CDC, STA, and DDR/PCIe IPs. Immediate Joiner preferred; on-site work in Bangalore.

Qualifications

• 7-8 years of hands-on FPGA design experience.
• Proficient in Verilog/VHDL and timing constraints.

Responsibilities

• Design, develop, and implement FPGA-based solutions using Verilog and/or VHDL.
• Perform CDC implementation and validation.
• Develop and maintain timing constraints and perform STA.
• Debug FPGA designs using oscilloscopes and logic analyzers.
• Work with FPGA IPs including DDR, PCIe, and High‑Speed Transceivers.
• Collaborate with hardware and software teams for integration and verification.

Skills

Verilog

VHDL

CDC

STA

Debugging

DDR

PCIe

Transceivers

Education

Bachelor's or Master's in Electronics/Electrical

Tools

AMD Vivado

Libero SoC

Intel Quartus

Job description

FPGA Design Engineer (7 - 8 Years Experience)

Location: Bangalore

Experience: 7 - 8 Years

Notice Period: Immediate Joiners / Candidates Available to Join Immediately Preferred

We are looking for an experienced FPGA Design Engineer to join our team in Bangalore. If you have strong expertise in FPGA design and are available to join immediately, we'd love to hear from you!

Key Responsibilities

• Design, develop, and implement FPGA-based solutions using Verilog and/or VHDL.
• Perform Clock Domain Crossing (CDC) implementation and validation.
• Develop and maintain timing constraints and perform Static Timing Analysis (STA).
• Debug FPGA designs using on-board tools such as oscilloscopes and logic analyzers.
• Work with FPGA IPs including DDR, PCIe, and High-Speed Transceivers.
• Collaborate with hardware and software teams for successful FPGA integration and verification.

Required Skills

• 7 - 8 years of hands‑on experience in FPGA Design.
• Strong proficiency in Verilog and/or VHDL.
• Solid experience with Clock Domain Crossing (CDC) techniques.
• Good understanding of Static Timing Analysis (STA) and timing constraints.
• Hands‑on experience with FPGA debugging using oscilloscopes and logic analyzers.
• Experience working with FPGA IPs such as DDR, PCIe, and Transceivers.
• Expertise in FPGA development tools such as:
• AMD Vivado
• Libero SoC
• Intel (Altera) Quartus

Preferred Qualification

• Bachelor's or Master’s degree in Electronics, Electrical Engineering, or a related field.

Work Location

• Bangalore (Work from Office)