Staff Physical Design Engineer-DPG-LPDDR

1840 Micron Tech. OP India LLP

New Delhi

On-site

INR 4,200,000 - 5,600,000

Full time

14 days+
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Job summary

Micron Technology, Inc. in Delhi seeks a senior Physical Design leader with 15+ years of hands-on experience to drive end-to-end RTL-to-GDSII implementation for complex SoCs across advanced nodes.

You will own floor planning, power planning, CTS, P&R, timing closure, and signoff, while leading PPA optimization and reliability closure. You will mentor global teams, collaborate with Architecture, RTL, DFT, and CAD groups, and push automation and AI-driven flows to accelerate tape-out readiness and

Qualifications

  • B. Tech/M. Tech in Electrical Engineering, VLSI, or related field.
  • 15+ years of hands‑on Physical Design experience with multiple successful SoC tape outs.
  • Strong expertise in Floor planning, CTS, P&R, STA, Low-Power Design, Physical Verification, and Signoff.
  • Hands‑on experience with ICC2/Fusion Compiler, Innovus, PrimeTime, Calibre, and EM/IR analysis tools.
  • Proficiency in Tcl, Python, Perl, or Shell scripting.
  • Strong technical leadership, problem‑solving, and stakeholder management skills.
  • Proven track record of leading large‑scale SoC RTL-to-GDSII programs, defining implementation strategy, and delivering first‑pass silicon success.
  • Experience in AI/ML, HPC, CPU, GPU, Networking, or Memory SoC designs.
  • Demonstrated success driving physical design methodology, automation, and organizational technical excellence.

Responsibilities

  • Lead end-to-end RTL-to-GDSII implementation for complex SoCs across advanced technology nodes.
  • Drive floor planning, power planning, CTS, place & route, timing closure, and physical signoff.
  • Own PPA optimization, low-power implementation, congestion management, and design convergence.
  • Lead STA, SI, EM/IR, DRC, LVS, and reliability closure to achieve tape out readiness.
  • Define physical design methodologies, automation strategies, and flow improvements.
  • Partner with Architecture, RTL, DFT, Verification, CAD, and Product Engineering teams to resolve complex implementation challenges.
  • Provide technical leadership, mentor engineers, and drive execution across global teams.
  • Hands‑on custom layout design experience enabling analog/mixed‑signal integration and advanced-node challenges.
  • Leverage AI tools to improve RTL-to-GDSII design productivity, quality, and turnaround time.
  • Drive adoption of Generative AI and Agentic AI for physical design automation and workflow optimization.

Skills

Floor planning
CTS
P&R
STA
Low-Power Design
Physical Verification
Signoff
Scripting (Tcl/Python/Perl/Shell)

Education

B. Tech/M. Tech in Electrical Engineering, VLSI, or related field

Tools

ICC2
Fusion Compiler
Innovus
PrimeTime
Calibre
EM/IR analysis tools

Job description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Key Responsibilities
  • Lead end-to-end RTL-to-GDSII implementation for complex SoCs across advanced technology nodes.
  • Drive floor planning, power planning, CTS, place & route, timing closure, and physical signoff.
  • Own PPA optimization, low-power implementation, congestion management, and design convergence.
  • Lead STA, SI, EM/IR, DRC, LVS, and reliability closure to achieve tape out readiness.
  • Define physical design methodologies, automation strategies, and flow improvements.
  • Partner with Architecture, RTL, DFT, Verification, CAD, and Product Engineering teams to resolve complex implementation challenges.
  • Provide technical leadership, mentor engineers, and drive execution across global teams.
  • Hands‑on custom layout design experience is a strong value‑added skill, enabling analog/mixed‑signal integration, layout optimization, and advanced‑node design challenges.
  • Leverage Artificial Intelligence (AI) tools to improve RTL-to-GDSII design productivity, quality, and turnaround time.
  • Drive adoption of Generative AI and Agentic AI solutions for physical design automation, design closure, and engineering workflow optimization.
Qualifications
  • B. Tech/M. Tech in Electrical Engineering, VLSI, or related field.
  • 15+ years of hands‑on Physical Design experience with multiple successful SoC tape outs.
  • Strong expertise in Floor planning, CTS, P&R, STA, Low-Power Design, Physical Verification, and Signoff.
  • Hands‑on experience with ICC2/Fusion Compiler, Innovus, PrimeTime, Calibre, and EM/IR analysis tools.
  • Proficiency in Tcl, Python, Perl, or Shell scripting.
  • Strong technical leadership, problem‑solving, and stakeholder management skills.
  • Proven track record of leading large‑scale SoC RTL-to-GDSII programs, defining implementation strategy, and delivering first‑pass silicon success.
  • Experience in AI/ML, HPC, CPU, GPU, Networking, or Memory SoC designs.
  • Demonstrated success driving physical design methodology, automation, and organizational technical excellence.
About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high‑performance DRAM, NAND, and NOR memory and storage products through our Micron and Crucial brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities - from the data center to the intelligent edge and across the client and mobile user experience.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

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