Sr Technical Lead - Verification

Weekday AI (YC W21); Bengaluru; On-site; INR 4,000,000 - 6,000,000; Full time

Job summary

Weekday AI (YC W21) in Bengaluru seeks a senior verification architect to own the verification delivery for sub-systems or SoCs. You will define the verification strategy, lead a 4–6 engineer team, and serve as the primary technical contact for the customer on scope, schedule and sign-off.

You will drive plan reviews, risk tracking, and weekly status reports, and work with design, DFT, firmware and physical design teams to resolve issues across boundaries while growing the team's technical depth.

Qualifications

• Minimum 8+ years of verification experience in SoC/sub-system level verification and at least 5 verification projects.
• Experience leading a verification team and coordinating with customers.
• Proficient in defining verification strategy across simulation, formal, emulation, and GLS.

Responsibilities

• Own verification delivery for a sub-system or SoC project and define the verification strategy.
• Lead a team of 4–6 engineers and act as main technical contact for customer on verification scope, schedule and sign-off.
• Manage project schedules, effort estimates, risk tracking and weekly status reports to the customer.
• Lead verification plan reviews, bug triage meetings and sign-off reviews with design and customer teams.
• Collaborate with design, DFT, firmware and physical design teams to resolve cross-boundary issues and mentor the team.

Skills

SoC verification

Team leadership

Verification strategy

UVM environments

Formal verification

UPF power verification

Tape-out experience

Customer interaction

Emulation/FPGA prototyping

Tools

Palladium

ZeBu

Veloce

Job description

Job Description

This role is for one of Weekday’s clients

Min Experience: 8+ years
Location: Bengaluru
JobType: full-time

Own verification delivery for a sub-system or SoC project. Define the verification strategy, lead a team of 4–6 engineers, and be the main technical contact for the customer on verification scope, schedule and sign-off.
Experience: 8 to 9 years. Must have 5 or more verification projects, at least 2 tapeouts, and at least 1 project where they led a verification team.

Desired Skills

• 1. Defines the overall verification strategy for a sub-system or SoC, deciding the mix of simulation, formal, emulation and GLS.
• 2. Architects SoC-level testbenches that combine UVM environments, embedded C tests, interconnect and system-level scenarios.
• 3. Strong expertise in 2 or more complex protocols, and in reviewing the verification environments built for them.
• 4. Applies formal verification for connectivity, protocol properties, or unreachability analysis to support coverage.
• 5. Owns the low-power verification strategy (UPF), including power-aware simulation and checks on power-mode sequences.
• 6. Owns project schedules, effort estimates, risk tracking and weekly status reports to the customer. 7
• . Leads verification plan reviews, bug triage meetings and sign-off reviews with the design and customer teams.
• 8. Works with design, DFT, firmware and physical design teams to resolve issues across those boundaries. Interviews candidates and grows the technical depth of the team.
• 9. Exposure to emulation (Palladium, ZeBu, Veloce) or FPGA prototyping is a plus.

Must-have skills

SoC or sub-system level verificatio, tape-out

Good-to-have skills

formal veification, emulation, UPF Ownership