Senior Principal Engineer - Verification

Weekday AI (YC W21); Bengaluru; Vor Ort; INR 3.500.000 - 6.000.000; Vollzeit

Zusammenfassung

Weekday AI in Bengaluru is seeking a senior verification architect to serve as the senior technical authority for verification across the organization. You will define verification architecture for the most complex SoCs, guide methodology, and resolve the toughest technical escalations while supporting pre-sales with technical solutions.

With 12–14 years of experience and a track record of 5+ tapeouts, you will mentor leads and principals, drive AI/ML-assisted verification, and represent the

Qualifikationen

• Experience defining verification architecture for complex SoCs.
• Lead organization-level verification methodology incl. UVM, guidelines, regression, coverage.
• Expert in formal verification, emulation and hybrid emulation, PSS, and co-verification.

Aufgaben

• Act as the senior technical authority for verification across the organization.
• Define verification architecture and methodology for the most complex SoCs; solve escalations.
• Support pre-sales with technical solutioning and verification approach for customer proposals.
• Drive AI/ML-assisted verification initiatives, such as coverage closure and test generation.
• Mentor principals and technical leads and represent the company in technical discussions with customer architects.

Kenntnisse

verification architecture

SoC verification

UVM framework

Jobbeschreibung

Job Description

This role is for one of Weekday’s clients

Min Experience: 12+ years
Location: Bengaluru
JobType: full-time

Act as the senior technical authority for verification across the organization. Define verification architecture and methodology for the most complex SoCs, solve the hardest technical escalations, and support pre-sales with technical solutioning. Influence comes through leads and principals rather than direct reports.

Experience: 12 to 14 years. Must have 5 or more tapeouts, including multiple complex SoCs, and a record of defining verification methodology at organization level.

Desired Skills

• Defines the verification architecture for complex SoCs, such as multi-cluster CPUs, coherent interconnects, PCIe, CXL and DDR/HBM subsystems, and chiplet or UCIe-based designs.
• Owns organization-level verification methodology: UVM framework standards, coding guidelines, VIP strategy, regression and coverage infrastructure.
• Expert in advanced techniques: formal verification, emulation and hybrid emulation, Portable Stimulus (PSS), and hardware/software co-verification.
• Evaluates and selects EDA tools, VIPs and flows, and builds strong relationships with EDA vendors.
• Is the escalation point for the hardest bugs, sign-off disputes and verification-closure risks across projects.
• Provides technical solutioning for pre-sales: verification approach, effort models and risk assessment for customer proposals.
• Drives AI/ML-assisted verification initiatives, such as coverage closure, regression triage and test generation.
• Mentors principals and technical leads, and builds technical depth across the verification practice.
• Represents the company in technical discussions with customer architects.

Must-have skills

• verification architecture
• SoC verification
• UVM framework

Good-to-have skills

• EDA tool evaluation
• AI/ML verification initiatives
• chiplet or UCIe experience.