Sr Manager, VLSI Design Engineering

Western Digital; Bengaluru; On-site; INR 3,500,000 - 6,000,000; Full time

Job summary

Western Digital in Bengaluru, India seeks an experienced Senior Manager of VLSI Design Engineering to lead a team of IO design engineers and drive the end-to-end IO design lifecycle from concept to silicon. The role requires strategic thinking, strong leadership, and a track record of delivering sophisticated IO solutions.

The ideal candidate will oversee project timelines, budgets, and resource allocation while steering innovation in VLSI design techniques and collaborating with manufacturing,

Qualifications

• Bachelors/Masters in Electronics & Telecommunication or Electrical Engineering with a focus on VLSI design.
• Extensive hands-on IO design experience and leadership exposure.
• Proven ability to manage multi-team projects and stakeholders.

Responsibilities

• Lead team of IO design engineers and drive end-to-end IO programs.
• Strategic development of next generation IO for scaling speed and performance.
• Build best-in-class IP design and align with BU stakeholders.
• Coordinate with cross-geo teams, manage timelines and budgets.
• Evaluate EDA tools and optimize power, timing, and signal integrity.

Skills

IO Design

Leadership

Team Management

Communication

NAND Flash Design

AI/ML chip design

Education

Bachelor's/Master's in Electronics & Telecommunication/Electrical (VLSI Design)

Tools

Finesim

HSPICE

Job description

Were looking for an experienced Senior Manager, VLSI Design Engineering to join our organization in Bangalore, India. In this role, you will lead a team of talented design engineers and drive the development of cutting-edge semiconductor solutions. You will be responsible for overseeing the entire VLSI design lifecycle, from concept through production, while maintaining the highest standards of quality and innovation. The ideal candidate will combine deep technical expertise with strong leadership capabilities, demonstrating a detail-oriented and analytical approach to complex engineering challenges.

• Lead team of experienced IO Design Engineers
• Strategic development of next generation IO for scaling speed
• Build Best in Class IP Design
• Handling Business Unit communication on all IO Roadmap, RMA, FA
• Drive End-End IO Design capability and execution till Silicon to Productization
• Manage project timelines, budgets, and resource allocation while maintaining organizational objectives
• Drive innovation in VLSI design techniques and stay current with emerging technologies and industry trends
• Evaluate and recommend EDA tools and design automation solutions to improve team efficiency
• Perform power analysis and optimization to meet performance and energy efficiency targets
• Communicate technical progress and strategic recommendations to senior management and stakeholders Qualifications

Qualifications

• Bachelors/Masters degree in Electronics & Telecommunication/Electrical engineering (VLSI Design)
• Extensive Hands-on design experience in IO Design (LVCMOS, HVCMOS, DDR, LVDS)
• 15+ years of Experience on handling IO designs, projects working with BU, Stake holders. 5+ years of leading a high performance team is desirable.
• NAND Flash Design knowledge is plus
• Expertise in ESD, Power bus, Floor plan, Layout guidelines
• Expertise, knowledge of advanced DDR algorithms: Training modes and DFE/CTLE/Compensation Techniques, Clock skew techniques
• Management and Lead experience to handle Team of IO engineers
• Experience in working with cross geo, cross team functions and stake holder management
• Expertise with package/board/Power integrity /signal integrity constraints is a plus.
• Strong communication skills & circuit design knowledge is preferred.
• Tool knowledge: spice tools: finesim, hspice & other flows
• Background in AI/ML chip design or emerging semiconductor technologies is a plus
• Experience coordinating with cross-functional teams including manufacturing, quality, and product engineering is desirable