SoC Verification Engineer

MediaTek; Bengaluru; On-site; INR 800,000 - 1,500,000; Full time

Job summary

A global technology firm in Bengaluru is seeking a Design Verification Engineer to ensure the quality of advanced SoC designs. You will be involved in integration testing, testbench design, and developing SoC level tests using C/Assembly language. The ideal candidate should have 3-15 years of experience in SoC verification, with strong expertise in verification methodologies, System Verilog, and UVM. This position offers the opportunity to work in a fast-paced and dynamic environment with global collaboration.

Qualifications

• 3-15 years of hands-on experience in SoC verification.
• Strong background in SoC verification methodologies and flows.
• Proficiency in System Verilog and UVM methodology.

Responsibilities

• Work on functional Test Plan at SoC level, focusing on integration testing.
• Write SoC level tests using C/Assembly language.
• Collaborate with cross-functional teams to optimize processes.

Skills

SoC verification methodologies

System Verilog

UVM methodology

Problem-solving

Communication skills

Education

Bachelor's degree in Computer Science, Electrical Engineering, or related fields

Tools

Python

Perl

TCL

Job description

Job Description

As a Design Verification Engineer at MediaTek, you will play a critical role in ensuring the quality and reliability of our cutting-edge SoC designs. You will work on innovative projects that power the future of technology, collaborating with a global team of experts in a fast-paced and dynamic environment.

Key Responsibilities

• Work on functional Test Plan at SoC level, focusing on Integration testing, system bus and peripheral connectivity and end to end transaction verification.
• Work on testbench design, and improvements for the required verification. Ensure seamless system boot-up integration and correct architecture/system level behavior of the design.
• Write SoC level tests using C/Assembly language.
• Identify and resolve verification issues. Develop and execute SoC verification methodologies and flows to ensure high-quality deliverables.
• Work on Netlist and SDF annotated design verification activities.
• Drive code and functional coverage closure and ensure through validation of designs.
• Collaborate with cross-functional teams to address verification challenges and optimize processes.

Qualifications

• Experience: 3-15 years of hands-on experience in SoC verification. Candidates with higher experience will be considered for senior or lead roles. The candidate has a strong background in computer science, electrical engineering, or related fields.
• Technical Expertise: Strong background in SoC verification methodologies and flows, with exposure to IP or Subsystem-level verification.
• Programming Skills: Proficiency in System Verilog and UVM methodology is essential.
• Problem-Solving: Excellent analytical and problem-solving skills, with attention to detail.
• Communication & Collaboration: Strong communication skills (written and verbal) and Ability to work collaboratively in a fast-paced environment spanning across geographies.
• Low Power Verification: Experience in low-power verification is a plus.
• Knowledge of Python/ Perl/TCL for automation and tool integration.