SENIOR/ STAFF / PRINCIPAL ENGINEER — NAND SILICON DESIGN VALIDATION (SDV)

Micron Technology, Inc.; Hyderabad; On-site; INR 5,000,000 - 7,000,000; Full time

Job summary

Micron Technology, Inc. in Hyderabad invites applications for Senior/Staff/Principal Engineer – NAND SDV.

Lead first-silicon bring-up, characterization, debug and validation of advanced 3D NAND products, ensuring design intent and datasheet compliance across temperature, voltage, and process corners. You will work across analog, mixed-signal, digital, firmware, memory-array and system teams to drive silicon validation, qualification, and manufacturing readiness, with opportunities to apply

Qualifications

• BS, MS, or PhD in Electrical, Electronics, Computer Engineering or related field.
• Experience appropriate to Senior Staff/Principal level.
• Strong analog and mixed-signal fundamentals with relevant memory validation experience.

Responsibilities

• Own validation strategies, coverage, and test plans for NAND circuits and functions.
• Lead first-silicon bring-up, characterization, debug, and silicon correlation.
• Characterize NAND subsystems including references, regulators, sensing paths, and firmware-controlled features.
• Investigate silicon failures with cross-functional teams and drive root-cause resolution.
• Convert observations into engineering insight and influence product decisions with validated evidence.

Skills

Analog/mixed-signal fundamentals

Mixed-signal verification

SystemVerilog

Python scripting

Cross-functional leadership

Data analysis

Education

Electrical/Electrical Engineering or Computer Engineering (BS/MS/PhD)

Tools

SystemVerilog

Verilog-AMS

SPICE

Job description

Req. ID: JR85529 SENIOR/ STAFF / PRINCIPAL ENGINEER — NAND SILICON DESIGN VALIDATION (SDV) (Evergreen)

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

ROLE

Lead first-silicon bring-up, characterization, debug, and validation of advanced 3D NAND products. Establish whether silicon meets design intent and datasheet requirements, correlate simulation with measurements, and resolve issues that could affect product qualification, reliability, yield, or SSD/system integration.

This role provides a unique opportunity to develop end-to-end expertise across advanced NAND products, spanning circuit design concepts, mixed-signal simulations, first-silicon bring-up, silicon debug, product qualification, and manufacturing readiness. Engineers gain broad exposure to analog, mixed-signal, digital, firmware, memory-array, and system-level behavior while working closely with design, verification, firmware, product, and system teams.

RESPONSIBILITIES

• Own validation strategies, coverage, and test plans for assigned NAND circuits and functions; define expected behavior, operating corners, and pass/fail criteria from product specifications and design intent.
• Lead first-silicon bring-up, characterization, debug, and simulation-to-silicon correlation across voltage, temperature, process, timing, and workload conditions.
• Characterize and debug NAND subsystems including reference and bias generation circuits, bandgap references, oscillators, voltage regulators, charge pumps, sensing and page-buffer paths, high-voltage program/erase circuitry, memory-core drivers, control and timing logic, interface circuitry, trim and calibration functions, and firmware-controlled mixed-signal features.
• Investigate silicon failures with Design, Verification, Firmware, Test, Reliability, Product Engineering, and SSD/System teams. Form evidence-based hypotheses, design targeted experiments, identify root causes, and drive issues to verified closure through hardware, firmware, test-flow, trim, or workaround solutions.
• Convert silicon observations into engineering insight and product decisions by explaining deviations from expected behavior, assessing risk, recommending next actions, reviewing validation evidence, mentoring engineers, and improving reusable validation and debug methodologies.
• Proven ability to leverage AI‑assisted (vibe) coding techniques to improve efficiency or automate design and analysis methodologies
• Leverage AI tools to automate the tools and workflowApplying Artificial Intelligence in workflows to improve build efficiency

REQUIRED QUALIFICATIONS

• BS, MS, or PhD in Electrical, Electronics, Computer Engineering, or a related field, with experience appropriate to the approved Senior Staff/Principal level.
• Strong analog and mixed-signal fundamentals with substantial experience in at least one of the following:
  • Mixed-signal verification
  • Analog/Mixed-Signal IC design
  • Post-silicon validation and characterization
  • Memory validation
• Experience with mixed-signal simulation environments, including full-chip, block-level, pre-layout, or post-layout simulations.
• Familiarity with Verilog/System-Verilog-based simulation and debug environments.
• Ability to derive tests from specifications, assess coverage, debug complex circuit behavior, and explain differences between expected and observed results.
• Experience with validation, characterization, data analysis, scripting, or automation using tools such as Python.
• Strong technical communication, problem-solving, and cross-functional leadership skills.

PREFERRED QUALIFICATIONS

• NAND Flash, SSD, DRAM, or other memory technology experience, including program/read/erase operations, sensing architectures, bias generation, charge pumps, timing/control circuits, reliability characterization, or system-level integration.
• Experience with System-Verilog, Verilog-AMS, real-number modeling, SPICE, assertions, functional coverage, or simulation-to-silicon correlation methodologies.
• Hands‑on experience with oscilloscopes, logic analyzers, probe stations, source measurement units (SMUs), semiconductor parameter analyzers, automated test equipment (ATE), or similar silicon characterization platforms.

Job Profile(s):

Product Development Engineer 3

Relocation level: (TBD)

Before Getting Started

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