Senior Staff Physical Design Floorplan

Mulya Technologies

Greater Noida

Hybrid

INR 4,000,000 - 6,000,000

Full time

6 days ago

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Job summary

Mulya Technologies in Bangalore is seeking a Staff or Senior Staff Physical Design Engineer with a focus on floorplanning. You will own the chip-top floorplan for complex SoCs, balancing performance, power, and area while coordinating with RTL and architecture teams.

The role requires 10+ years in physical design, expertise in floorplanning, EMIR/IR-drop, and scripting for automation. You will work in a hybrid setup with two days in the office and three days from home.

Qualifications

B.Tech or M.Tech in Electrical/Electronic Engineering or equivalent.
10+ years in Physical Design with tape-outs at advanced nodes.
Strong scripting skills in TCL/Python/Perl are required.

Responsibilities

Architectural Floorplanning: Lead chip-level floorplanning for multi-million gate designs.
EMIR Mastery and IR-drop analysis; diagnose root causes and propose fixes.
Cross-Functional PPA trade-offs with RTL and Architecture teams.
Develop automated floorplanning flows for the wider team.

Skills

PPA

Innovus

Cadence

TCL

Python

Perl

ICC2

PDN

EMIR

Voltus

Redhawk

3nm

2nm

bump

rdl

Education

B.Tech/M.Tech in Electrical/Electronic Engineering or equivalent

Job description

Location : Bangalore Staff/Senior Staff Physical Design Floorplan (Hybrid-2 days office/3 days home ) Bangalore EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Staff/Senior Staff Physical Design Floorplan Experience: 10–14 Years Location: Bangalore/2 days to work Department: RTL-to-GDSII / Physical Implementation

Role Overview

We are seeking a high-caliber Staff or Senior Staff Physical Design Engineer with a specialized mastery of Floorplanning design. You won’t just be pushing buttons; you will be the architectural bridge between RTL/Systems and the final GDSII. This role requires a visionary who understands how a single floorplan decision ripples through the entire PPA (Power, Performance, Area) spectrum. As a technical lead, you will own the chip-top floorplan for complex, large-scale SoCs or Sub-chips, driving strategies that balance aggressive performance targets with robust power integrity.

Key Responsibilities

Architectural Floorplanning: Lead chip-level floorplanning, including macro placement, pin assignment, and partition definition for multi-million gate designs.
EMIR Mastery: Perform exhaustive IR-drop (Static/Dynamic) and Electromigration (EM) analysis. You must be able to diagnose root causes and propose architectural or physical fixes that don't compromise timing.
Cross-Functional PPA Trade-offs: Collaborate directly with RTL and Architecture teams. You will use "Design Thinking" to influence the micro-architecture, suggesting changes to bus widths, pipeline stages, or memory configurations to optimize physical outcomes.
Methodology Development: Establish best practices and automated flows for floorplanning and PDN synthesis to be used by the wider implementation team.

Technical Requirements

Core Experience: 10+ years in Physical Design with a proven track record of multiple successful tape-outs at advanced nodes ( 7nm, 5nm, or 3nm ).
PDN Expertise: Ability to model complex power-up sequences and multi-voltage domains.
Floorplanning Savvy: Deep proficiency in hierarchical physical design and top-level integration using industry-standard tools (Innovus or IC Compiler II).
Analysis Skills: Strong understanding of thermal‑aware PDN and the physical implications of high‑current density paths.
Scripting: Advanced proficiency in Tcl, Python, or Perl to automate complex floorplanning tasks and data analysis.

Behavioral Attributes

Critical Thinker: You don't just follow a recipe. You question constraints and look for "hidden" PPA gains.
Design Thinking: Ability to empathize with the challenges of upstream (RTL) and downstream (Sign‑off) teams to create a holistic solution.
Influence: You can articulate technical trade-offs to stakeholders.

Education