Senior SoC Integration Design Lead

Google India Pvt Ltd; Bengaluru; Sur place; INR 5 500 000 - 9 500 000; Plein temps

Résumé du poste

Google India Pvt Ltd in Bengaluru seeks a senior SoC Integration Design Lead to guide a multidisciplinary team in developing complex IPs and subsystems. You will own microarchitectures and oversee end-to-end implementation while coordinating with Architecture, Firmware, and Software teams to deliver features on schedule.

The role emphasizes leadership in a fast-paced environment, with responsibility for design methodology, verification, and performance/power optimizations across projects.

Qualifications

• 10 years in ASIC development with HDL/Chisel experience.
• 5 years in micro-architecture and design of SoCs/subsystems.
• 4 years in people management and employee development.

Responsabilités

• Lead SoC/SS integration team.
• Drive development of complex IPs and subsystems with Bengaluru engineers.
• Own IP microarchitecture and implementation.
• Collaborate across Architecture, Firmware, and Software teams for feature closure.
• Shape design methodology, libraries, debugging, and DV coordination.

Connaissances

ASIC design

Verilog/SystemVerilog

VHDL/Chisel

Microarchitecture

People management

Formation

Bachelor's degree in Electrical/Computer Engineering or CS

Equivalent practical experience

Master/PhD preferred (EE/CE/CS)

Outils

ASIC verification tools

Synthesis tools

Timing/Power analysis

DFT tools

Description du poste

Silicon SoC Integration Design Lead, Google Cloud

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience in ASIC development with Verilog/SystemVerilog, VHDL, or Chisel.
• 5 years of experience in micro-architecture and design of SoCs and subsystems.
• 4 years of experience in people management, developing employees.
• Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).

Preferred qualifications

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience in SoC designs and integration flows.
• Knowledge of arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
• Knowledge of high-performance and low power design techniques.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products.

You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible.

We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

• Lead SoC/SS integration team.
• Drive development of complex IPs and Subsystems along with a team of engineers in the Bengaluru design organization.
• Own microarchitecture and implementation of IPs and subsystems.
• Work with Architecture, Firmware and Software teams to drive feature closure and develop microarchitecture specifications.
• Drive design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams.
• Identify and drive Power, Performance and Area improvements for the domains owned.

Experience Level

Senior Level