Senior Principal GPU verification Engineer

NXP Semiconductors; Bengaluru; On-site; INR 2,500,000 - 3,500,000; Full time

Job summary

NXP Semiconductors is looking for a GPU Verification Lead based in Bengaluru, Karnataka. The role involves verifying complex GPU IPs and ensuring performance and correctness while collaborating with global design teams.

You will develop verification plans, build UVM-based environments, and lead junior engineers. A strong background with 13+ years in SystemVerilog, UVM, and debugging RTL issues is essential for this position.

Qualifications

• 13+ years of experience.
• Strong experience in SystemVerilog, UVM, and Verilog.
• Good understanding of functional verification methodologies.

Responsibilities

• Develop and execute verification plans for GPU IP blocks.
• Build scalable SystemVerilog/UVM-based verification environments.
• Develop models for GPU command processing and caches.
• Lead and mentor junior verification engineers.
• Own end-to-end IP verification sign-off.

Skills

SystemVerilog

UVM

Verilog

Functional verification methodologies

Debugging complex RTL

Formal verification

Job description

GPU Verification Lead

In this role you will be responsible for verifying complex GPU IPs and subsystems, ensuring functional correctness, performance, and first-pass silicon success while collaborating with global design and architecture teams.

Key Responsibilities

• Develop and execute verification plans for GPU IP blocks (vector graphics, shader cores, memory interfaces and caches)
• Build scalable SystemVerilog/UVM-based verification environments with reusable UVM components (agents, monitors, scoreboards)
• Develop models for GPU command processing, memory transactions and cache coherency
• Lead and mentor junior verification engineers
• Own end-to-end IP verification sign-off
• Manage regressions and debug failures
• Track coverage metrics and verification closure

Required Expertise

• 13+ years of experience
• Strong experience in SystemVerilog, UVM, and Verilog
• Good understanding of functional verification methodologies
• Assertions (SVA) and coverage
• Experience debugging complex RTL and testbench issues
• Experience in formal verification is an added plus