Senior EMIR Engineer

LeadSoc Technologies Pvt Ltd; Bengaluru; On-site; INR 900,000 - 1,700,000; Full time

Job summary

LeadSoc Technologies Pvt Ltd in Bengaluru is seeking an EMIR Engineer to drive power integrity, IR drop, and electromigration analysis for advanced SoC designs. The ideal candidate will lead and mentor a team of engineers and collaborate with RTL, PD, Verification, and Packaging.

You will define and implement EMIR sign-off flows using Redhawk, Voltus, Totem, and related tools, plan PDN architecture, and perform chip-package co-design to ensure robust power delivery across die, package, and board.

Qualifications

• 3-6 years of EMIR, power integrity, and PDN design experience.
• Experience with EMIR sign-off methodologies and tool flows.
• Experience with cross-functional collaboration across RTL, PD, Verification, and Packaging.

Responsibilities

• Lead IR drop, electromigration, and power integrity analysis across blocks and full-chip designs.
• Define, implement, and optimize EMIR sign-off flows using industry-standard tools (Redhawk, Voltus, Totem, etc.).
• Drive PDN architecture planning and collaborate with Physical Design teams to ensure robust power delivery.
• Perform chip-package co-simulation to validate power distribution across die, package, and board.
• Review and analyze EMIR reports, debug issues, and provide recommendations to closure.
• Own and automate EMIR flows using Python/Perl/TCL scripting.
• Collaborate with cross-functional teams for design convergence.
• Mentor and guide junior engineers in EMIR methodologies and best practices.

Skills

IR drop

Electromigration

Power integrity

EMIR sign-off

PDN planning

Chip-package co-design

Python

Perl

TCL scripting

Team leadership

Mentoring

Tools

Redhawk

Voltus

Totem

Job description

We are seeking a EMIR Engineer to drive power integrity, IR drop, and electromigration analysis for advanced SoC designs. The ideal candidate will have strong expertise in EMIR sign-off methodology, PDN planning, and chip-package co-design, along with the ability to lead and mentor a team of engineers.

Experience :- 3 Years to 6 Years

Key Responsibilities:

• Lead IR drop, electromigration, and power integrity analysis across multiple blocks and full-chip designs.
• Define, implement, and optimize EMIR sign-off flows using industry-standard tools (Redhawk, Voltus, Totem, etc.).
• Drive PDN architecture planning and collaborate with Physical Design teams to ensure robust power delivery.
• Perform chip-package co-simulation to validate power distribution across die, package, and board.
• Review and analyze EMIR reports, debug issues, and provide recommendations to closure.
• Own and automate EMIR flows using Python/Perl/TCL scripting.
• Collaborate with cross-functional teams (RTL, PD, Verification, Packaging) for design convergence.
• Mentor and guide junior engineers in EMIR methodologies and best practices.