Senior Design Verification Infrastructure Engineer - VIPs and Testbench

SiFive; Bengaluru; On-site; INR 1,500,000 - 3,500,000; Full time

Job summary

PVH (Tommy Hilfiger/Calvin Klein) in Bengaluru seeks a Design Verification Engineer to architect and maintain the Verification Platform infrastructure and related testbenches. You will develop reusable libraries and VIPs to enable scalable verification across multiple projects, while collaborating with design teams to ensure quality and efficiency.

Candidates should bring SystemVerilog and UVM experience, plus a background in designing verification components.

Qualifications

• Design Verification experience with SystemVerilog and UVM.
• Experience designing and verifying VIPs, AIPs, and testbench components.
• Typically 3+ years with BS/MS/PhD in EE/CE/CS or related field.

Responsibilities

• Architect, develop, and maintain the Verification Platform infrastructure.
• Develop Verification Platform libraries for expressing verification in Scala with Chisel, including test harnesses and scoreboards.
• Develop Verification Platform VIPs, AIPs, and testbench components using SystemVerilog, UVM, and related technologies.
• Create verification test plans and testbenches to verify and release components with high quality.
• Educate teams on best practices and how to use the Verification Platform.

Skills

SystemVerilog & UVM

VIPs/AIPs/testbenches

Software engineering practices

Education

BS/MS/PhD in EE/CE/CS

Tools

Chisel

Scala

Python

Job description

Job Description

Design Verification Engineer – Verification Platform

Responsibilities

• Architect, develop, and maintain the Verification Platform to provide a common infrastructure that scales with the growth of SiFive for Design Verification and other verification and validation activities
• Develop Verification Platform libraries for expressing verification intent in Scala with Chisel, including test harnesses, stimulus, scoreboards, and other generators
• Develop Verification Platform VIPs, AIPs, and other testbench components using System Verilog, UVM, and other related technologies
• Develop Verification Platform test plans and testbenches to verify and release testbench components with high quality
• Educate the Design Verification and other verification and validation teams on best practices and how to achieve them with the Verification Platform

Requirements

• Design Verification experience with System Verilog and UVM
• Experience designing and verifying VIPs, AIPs, and other testbench components
• Understanding of modern software engineering practices
• Typically 3+ years with BS/MS/PhD in EE/CE/CS or related field

Desired

• Experience with Chisel, Scala, and/or Python
• Understanding of EDA tools and flows for Design Verification
• Familiarity with DevOps practices, build systems, and CI/CD

Additional Information

• This position requires a successful background and reference check and satisfactory proof of your right to work in India
• An offer of employment for this position is also contingent on the Company verifying that you are authorized for access to export‑controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals

SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.