Senior IP Verification Engineer(IOMMU-N)

SiFive India Private Limited; Bengaluru; On-site; INR 1,000,000 - 1,500,000; Full time

Job summary

SiFive India Private Limited in Bengaluru is looking for a Verification Engineer to define test plans and verification strategies. The role requires at least 3 years of experience in digital verification, focusing on CPU verification. Candidates should be proficient in System Verilog and UVM, with strong programming skills.

The ideal applicant will join a diverse team committed to driving innovation in RISC-V technology. The position offers opportunities to work on cutting-edge compute platforms impacting various industries.

Qualifications

• 3+ years of experience in DV, preferably in CPU verification.
• Very good object-oriented programming skills.
• Any CPU architecture knowledge with test writing/test plan experience.

Responsibilities

• Analyze architectural specifications to define verification strategies.
• Design scalable verification environments using System Verilog and UVM.
• Write complex sequences and constrained-random tests.

Skills

System Verilog

UVM methodology

Python

C/C++

Object-oriented programming

Education

Bachelor's or Master's in Engineering

Tools

Verdi

SimVision

Job description

About SiFive As the pioneers who introduced RISC‑V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC‑V to the highest performance and most data‑intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC‑V has no limits. At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are. Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time. Are you ready?

Job Description

Core Responsibilities

• Verification Planning: Analyze architectural specifications to define verification strategies and create comprehensive test plans that outline test cases, checkers, and coverage goals.
• Testbench Development: Design and implement scalable, reusable, and constrained‑random verification environments using System Verilog and UVM (Universal Verification Methodology).
• Stimulus & Constraint Generation: Write complex sequences and constrained‑random tests to stress‑test the IP across corner cases.
• Debugging: Perform deep‑dive root cause analysis on RTL design failures and testbench issues using waveform viewers (e.g., Verdi, SimVision).
• Coverage Closure: Define and track functional and code coverage metrics. Write covergroups and coverpoints to ensure all architectural features have been exercised.

Languages

• System Verilog, Verilog, Python/Perl (scripting), C/C++

Methodologies

• UVM (highly preferred), OVM, or VMM

Protocols

• AXI, AHB

Requirements

• 3+ years of experience in DV preferably in CPU verification with Bachelor's or Master's in Engineering.
• Proficiency in System Verilog and UVM methodology. Very good object‑oriented programming skills.
• Any CPU architecture knowledge (x86, ARM or RISC‑V) with test writing/test plan implementation experience.
• Any scripting knowledge, preferably Python.
• Bus interface knowledge like AXI or PCIE. Integration experience with third party VIPs like bus VIPs.
• CPU micro‑arch knowledge.

Additional Information

This position requires a successful background and reference checks, satisfactory proof of your right to work in India, and compliance with export control laws. SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.