Senior Design Lead

HCLTech; Bengaluru; Vor Ort; INR 2.500.000 - 4.500.000; Vollzeit

Zusammenfassung

HCL Technologies Limited in Bengaluru is seeking a Senior Design Lead to own end-to-end PCB layout for complex, high-density server-board designs. You will perform high-speed digital layout for interfaces like HBM, DDR5/PCIe Gen5/6, with emphasis on impedance, matching, and crosstalk.

Collaborate with electrical engineers on schematics and with mechanical teams for physical constraints and thermal/stack-up decisions.

Qualifikationen

• Experience with high-density PCB layouts and high-speed signals.
• Proficiency with DDR5/LPDDR5, PCIe Gen5/Gen6 interfaces.
• Familiar with DFA/DFM/DFT and quality fabrication standards.

Aufgaben

• Own end-to-end PCB layout for complex, high-density designs.
• Collaborate with electrical engineers to review schematics and provide layout feedback.
• Drive design-for-manufacturability reviews with contract manufacturers.
• Maintain and improve PCB design standards, libraries and footprints.
• Support layout documentation and prototype-to-production revisions.

Kenntnisse

Advanced Proficiency In Allegro Pcb

Cad Software 2D/3D Design

10-14 years CAD experience

HDI micro via technology

SoC/FPGA PCB design experience

High Density/High Speed memory designs

CES (Constraint Editor) knowledge

PCB layout for DDR5/LPDDR5, PCIe Gen5/

Communication & presentation abilities

Tools

Cadence Allegro

CES (Constraint Editor)

Jobbeschreibung

Career Opportunities: Senior Design Lead (190982)

Requisition ID190982-Posted11/10/2026

PCb Design engineer: Key ResponsibilitiesOwn end-to-end PCB layout for complex, high-density designs used in data center server boards Perform high-speed digital layout for interfaces like HBM,DDR4/5, PCIe Gen 5/6, USB 3.2 or higher, with attention to controlled impedance, length matching, and crosstalk mitigation Develop and enforce layout design rules for High-speed digital, analog, mixed-signal, and power domains within tightly constrained wearable form factors Collaborate with electrical engineers to review schematics and provide layout-driven feedback on component placement, power distribution network design, and signal routing strategies Partner with mechanical engineers to resolve physical constraints including board outline, connector placement, thermal management, and stack-up definition Drive design-for-manufacturability reviews with contract manufacturers and PCB fabricators to ensure layouts meet yield and reliability targets Maintain and improve PCB design standards, layer stack-up libraries, and footprint libraries to support scalable development across multiple hardware programs Support by providing layout documentation, net tracing support, and design revision analysis for prototype and production boards LONGDESCRIPTION section. 3 of 6.

Key Responsibilities

Section Title: Skill RequirementsSkill Requirements

• 1. Advanced Proficiency In Allegro Pcb For Pcb Layout And Design.
• 2. Strong Knowledge Of Cad Software For 2D And 3D Design Applications.
• 3. 10-14 years of CAD experience, Cadence Allegro Layout tool 23.1 and above experience is mandatory
• 4. Hands on experience in HDI micro via( Blind/Buried) technology
• 5. Intel or high complex SoC/Microprocessor/FPGA based PCB design experience preferred
• 6. high complex SoC/Microprocessor/FPGA based PCB design experience preferred
• 7. Ability to deliver PCB CAD layout of High Density, High Speed memory designs (DDR5/LPDDR5), PCIe Gen 5 or Gen 6, Power Delivery, Mixed Analog/Digital
• 8. Deep knowledge of CES (Constraint Editor) and high -speed constraint driven designs, DFA/DFM/DFT knowledge to adhere to Quality PCB fabrication and assembly assurance
• 9. Strong Communication And Presentation Abilities To Effectively Convey Design Concepts.

Skill Requirements

Section Title: Skill RequirementsSkill Requirements

• 1. Advanced Proficiency In Allegro Pcb For Pcb Layout And Design.
• 2. Strong Knowledge Of Cad Software For 2D And 3D Design Applications.
• 3. 10-14 years of CAD experience, Cadence Allegro Layout tool 23.1 and above experience is mandatory
• 4. Hands on experience in HDi micro via( Blind/Buried) technology
• 5. Intel or high complex SoC/Microprocessor/FPGA based PCB design experience preferred
• 6. high complex SoC/Microprocessor/FPGA based PCB design experience preferred
• 7. Ability to deliver PCB CAD layout of High Density, High Speed memory designs (DDR5/LPDDR5), PCIe Gen 5 or Gen 6, Power Delivery, Mixed Analog/Digital
• 8. Deep knowledge of CES (Constraint Editor) and high -speed constraint driven designs, DFA/DFM/DFT knowledge to adhere to Quality PCB fabrication and assembly assurance
• 9. Strong Communication And Presentation Abilities To Effectively Convey Design Concepts.