Senior PCB CAD / Design Engineer - Immediate or not working

Kairos Technologies Inc.; Chennai District; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Kairos Technologies Inc. in Chennai is seeking a Senior PCB CAD/Design Engineer to lead high-speed, multi-layer PCB design from schematic capture to fabrication files.

You will work with Cadence Allegro, Concept HDL, and System Capture, ensuring impedance control, routing integrity, and manufacturability across projects. Strong communication across sites and documentation skills are essential.

Qualifications

• Bachelor's degree in Electrical/Electronics or related field.
• 8–12+ years in high-speed, multi-layer PCB design.
• Experience with semiconductor test, ATE, or high-performance hardware systems.

Responsibilities

• Execute complete PCB design using Cadence Concept HDL and System Capture for schematic entry through to physical fabrication file generation.
• Create and modify circuit schematics and develop accurate footprints.
• Perform routing and design verification for high-density multi-layer boards using Allegro PCB Editor.
• Define electrical, physical, and DFM rules in Cadence Constraint Manager and apply impedance and length-matching constraints.
• Collaborate with Simulation, DFT, DFA/DFM teams to address testability and manufacturing issues.
• Manage part numbers, BOMs and ECNs in Siemens Teamcenter; prepare release packages.

Skills

Communication

Documentation

Collaboration

Education

Bachelor's degree in Electrical/Electronics Engineering or related field

Tools

Cadence Allegro

Allegro PCB Editor

Concept HDL

System Capture

Constraint Manager

Valor

ViewMate

Siemens Teamcenter

AutoCAD

Visio

Microsoft Office

Job description

Hi,

Job Description: Senior PCB CAD / Design Engineer

Job Title: Senior PCB CAD / Design Engineer

Location: Chennai

Qualifications & Requirements

Basic Qualifications

• Education: Bachelors degree in Electrical/Electronics Engineering or a related field, or equivalent experience.
• Experience: 812+ years in high-speed, multi-layer PCB design.
• Industry: Experience with semiconductor test, ATE, or high-performance hardware systems.

Technical Skills & Tool Expertise

• Cadence: Strong hands-on expertise in the Allegro toolchain:
• Allegro PCB Editor 17.2, 23.1, or later for high-speed, multi-layer layouts.
• Concept HDL/System Capture for schematic capture.
• Constraint Manager for high-speed constraints and routing rules.
• Verification: Gerber/ODB++ review using Valor or ViewMate.
• PLM/PDM: Siemens Teamcenter for BOM and ECN management.
• Standards: IPC standards and rigid, flex, and rigid-flex PCB fabrication.

Preferred Qualifications

• Polar Si9000 experience in impedance and stack-up modelling.
• Familiarity with AutoCAD, Visio, and Microsoft Office.
• Knowledge of analog/digital design, PDN, and high-speed buses.

Professional & Interpersonal Skills

• Strong communication, documentation, and collaboration skills across sites.
• Innovative, structured problem-solving skills.
• Ability to manage deliverables across concurrent projects.

Key Responsibilities

1. PCB Layout & Schematic Capture

• Execute complete PCB design activities utilizing Cadence Concept HDL and System Capture for schematic capture and design entry through to physical fabrication file generation.
• Create and modify circuit schematics based on customer-defined and system-level requirements.
• Develop, verify, and maintain logical schematic symbols and highly accurate physical PCB footprints.
• Perform physical routing assessments and technical feasibility studies for high-density, multi-layer designs utilizing Allegro PCB Editor.

2. Constraint & Rules Management

• Define electrical, physical, and DFM rules in Cadence Constraint Manager.
• Apply controlled impedance, differential-pair routing, length matching, and crosstalk mitigation.
• Develop controlled-impedance stack-ups and calculate pre-layout impedance.

3. Cross-Functional Engineering Collaboration

• Collaborate with Simulation Engineers to meet SI and PI requirements.
• Partner with DFT Engineers to resolve testability and probe-access issues.
• Work with DFA and DFM Engineers to resolve manufacturing issues before and during prototyping.
• Coordinate with PCB fabrication and assembly suppliers to align layouts with manufacturing capabilities.

4. Lifecycle & Documentation

• Manage part numbers, BOMs, and ECNs in Siemens Teamcenter.
• Prepare manufacturing, assembly, and test packages for release.
• QA final design packages for completeness, compliance, and quality.
• Maintain standard interface-board CAD templates for customer use.