RTL Design (SOC) Engineer-Principal/Manager

QUALCOMM, Inc.; Bengaluru; Presencial; INR 4 000 000 - 7 000 000; Tempo integral

Resumo da oferta

Qualcomm India Private Limited seeks an experienced SoC engineer to join the CSG team working on Dragonfly, Qualcomm's rack-scale AI platform. You will contribute to data center innovations across architecture, verification, and front-end design, with emphasis on high-speed IO and power-aware techniques.

The role requires 8+ years in SoC development and a strong background in design convergence, IP management, and IO protocols. Bengaluru site offers collaboration across engineering groups.

Qualificações

• 8+ years of proven experience in SoC development and full-chip design.
• Bachelor’s or master’s degree in ECE, CS, or related field.
• Experience with design convergence cycle: architecture, micro-architecture, verification, synthesis, timing closure.
• Experience with IP dependencies and planning front-end design tasks.
• Design and development of high-speed serial IO protocols.
• Clock rate compensation FIFO, gearbox design for data width, power gating, low power modes.

Conhecimentos

Communication skills

Interpersonal skills

High-speed IO design

Clock rate compensation

Data width gearbox

Formação académica

Bachelor's degree in Computer Science or Electrical Engineering

Ferramentas

AHB/AXI

PCIe/USB/Ethernet

Descrição da oferta de emprego

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Job Description

You will be part of the CSG team focused on Data Center innovation through next-gen architectures for Dragonfly which is Qualcomm's rack-scale Agentic AI platform, reshaping compute efficiency and scalability for the AI era .

• Education: Bachelor’s or master’s degree in Electrical or Electronics and Communication or Computer Science Engineering.
• Experience: 8+ years of proven experience in SoC development, and full-chip design
• Expertise:
  • Good understanding of the design convergence cycle, including architecture, micro-architecture, Verification, Synthesis and timing closure.
  • Expertise in managing IP dependencies, as well as planning front-end design tasks.
  • Design and development of high-speed serial IO protocols
  • Implementation of clock rate compensation FIFO, gearbox design for data width, bypass on controller, power gating, low power modes
• Skills:
  • Excellent communication and interpersonal skills.

Minimum Qualifications:

• Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc.
• Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage.
• Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

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