RFIC Digital Verification Sr Engineer

Qualcomm; Bengaluru; On-site; INR 900,000 - 1,500,000; Full time

Job summary

Qualcomm India Private Limited in Bengaluru is seeking a Digital Verification Engineer for IPs, ASICs, and chipsets used in Snapdragon power solutions. You will perform block/subsystem/SoC level verification using constrained-random coverage and RTL and gate-level methods.

Ideal candidates have 2+ years hardware verification experience, with SV, UVM, and SVA in a mixed-signal context; a Bachelor's degree in CE/EE/CS, or a Master's degree in related field.

Qualifications

• Bachelor's degree in CS, EE, or related field.
• 2+ years of hardware verification experience.
• Master's degree in a related field may be considered as an alternative.

Responsibilities

• Block/Subsystem/SoC level digital verification using constrained-random coverage methodologies at RTL and Gate Level.
• The verification tasks involve SV/UVM/UVM_RAL/Randomization/Coverage/SVA.

Skills

SV/UVM/UVM_RAL

Constrained-random verification

RTL & Gate-level verification

Education

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field

Tools

SV

UVM

SVA

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Digital Verification Engineer for IPs, ASICs, and Chipsets used in Qualcomm Snapdragon power solutions.

Job Description

Qualcomm is a company of inventors that unlocked 6G ushering in an age of rapid AI acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives.

But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 6Gs potential into world-changing technologies and products. This is the AI Invention Age, and this is where you come in.

QCT is currently seeking digital verification engineers for the mixed-signal ASICs that support QCTs mobile platforms for next generation 6G RFIC/PMIC/Codec technologies.

Successful candidates will be working on the following:

• Block/Subsystem/SoC level digital verification using constrained-random coverage methodologies at both RTL and Gate Level.
• The skills involved includes SV/UVM/UVM_RAL/Randomization/Coverage/SVA.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• OR
• Master's degree in