RFIC Digital Verification Sr Engineer

Nutanix; Bengaluru; On-site; INR 1,200,000 - 2,400,000; Full time

Job summary

Qualcomm India Private Limited is seeking a Digital Verification Engineer to verify IPs, ASICs, and chipsets used in Snapdragon power solutions. You will perform block/subsystem/SoC level verification using constrained-random methodologies at RTL and gate level, employing SV/UVM, randomization, and coverage techniques.

Preferred candidates have experience with test plans, verification testbenches, and debugging RTL/Gate-level simulations, plus power-aware verification and scripting skills.

Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
• Experience in writing Test Plans independently
• Experience in writing/updating Verification Testbench
• Experience with debugging RTL & Gate level simulations
• Experience with Functional Coverage & Code Coverage
• Experience with Scripting in Perl, Python, Tcl
• Experience with planning Verification architecture, review testbench/ testplans with juniors, identify coverage gaps, propose alternate methods for coverage
• Should have been involved in leading a chip DV effort
• Should have been self-driven and quick learner
• Experience with Power aware(UPF) verification and debugs is plus
• Silicon Debug Experience a plus
• Experience with Mixed Signal Designs involving DSP a plus
• Modeling Experience with Matlab, Octave a plus

Responsibilities

• Block/Subsystem/SoC level digital verification using constrained-random coverage methodologies at both RTL and Gate Level.
• The skills involved includes SV/UVM/UVM_RAL/Randomization/Coverage/SVA.

Skills

SV/UVM

UVM_RAL

Randomization

Code Coverage

RTL simulations

Gate-level simulations

Debugging RTL

Functional Coverage

Perl scripting

Python scripting

Tcl scripting

UPF/Power aware

Matlab

Octave

Education

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field

Tools

Matlab

Octave

Job description

Company: Qualcomm India Private Limited

Job Area: Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Digital Verification Engineer for IPs, ASICs, and Chipsets used in Qualcomm Snapdragon power solutions.

Job Description

Qualcomm is a company of inventors that unlocked 6G ushering in an age of rapid AI acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives.

But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 6Gs potential into world-changing technologies and products. This is the AI Invention Age, and this is where you come in.

QCT is currently seeking digital verification engineers for the mixed-signal ASICs that support QCTs mobile platforms for next generation 6G RFIC/PMIC/Codec technologies.

• Block/Subsystem/SoC level digital verification using constrained-random coverage methodologies at both RTL and Gate Level.
• The skills involved includes SV/UVM/UVM_RAL/Randomization/Coverage/SVA.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Preferred Qualifications

• Experience in writing Test Plans independently
• Experience in writing/updating Verification Testbench
• Experience with debugging RTL & Gate level simulations
• Experience with Functional Coverage &Code Coverage
• Experience with Scripting in perl, python, tcl
• Experience with planning Verification architecture, review testbench/ testplans with juniors, identify coverage gaps, propose alternate methods for coverage
• Should have been involved in leading a chip DV effort
• Should have been self-driven and quick learner
• Experience with Power aware(UPF) verification and debugs is plus
• Silicon Debug Experience a plus.
• Experience with Mixed Signal Designs involving DSP a plus
• Modeling Experience with Matlab, Octave a plus

Minimum Qualifications

Required: Bachelor's, Electronics or EE, 3+ years of work experience

Preferred: Master's, VLSI, Electronics or EE. 2+ years of experience

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.