Turing-IP Design Verification - Sr Engineer

Qualcomm; Bengaluru; On-site; INR 1,200,000 - 2,000,000; Full time

Job summary

Qualcomm India Private Limited in Bengaluru seeks a skilled DV Engineer to join the IP verification team. You will own functional verification of IPs and subsystems from planning through sign‑off, collaborating with design and architecture to define verification strategies and build robust testbenches.

You’ll work with SystemVerilog and UVM, develop constrained‑random scenarios, create coverage models, and debug using waveform tools.

Qualifications

• 3–5 years of hands-on ASIC/SoC functional verification.
• Strong proficiency in SystemVerilog and UVM methodology.
• Proven IP/subsystem/SoC verification experience.
• Solid understanding of constrained-random testing, functional coverage, and SVA.
• Strong debugging skills with waveform and log analysis.
• Knowledge of digital design fundamentals and bus protocols.

Responsibilities

• Own and drive functional verification of IPs and subsystems from planning through sign-off.
• Develop verification plans, testbench architecture, and test cases from specs.
• Build reusable, scalable verification environments using SystemVerilog and UVM.
• Develop constrained-random and directed test scenarios, assertions, and coverage models.
• Drive coverage closure and debug failures using waveform/log analysis.
• Collaborate with design, architecture, and SoC teams to ensure verification completeness.
• Contribute to regression setup, triage, and maintenance for verification quality.
• Support IP-to-subsystem-to-SoC integration and reuse of verification collateral.

Skills

SystemVerilog

UVM

IP verification

SoC verification

Debug tools

Education

Bachelor's degree in CS/EE or related field

Master's degree in CS/EE or related field

PhD in CS/EE or related field

Tools

Verdi/FSDB

Waveform analysis

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

About the Role

We are looking for a skilled and motivated DV Engineer to join our IP verification team. In this role, you will be responsible for the functional verification of complex IPs and subsystems that form the building blocks of our next-generation SoCs. You will work closely with design, architecture, and SoC integration teams to define verification strategies, build robust testbenches, and drive coverage closure to deliver high-quality silicon.

Key Responsibilities

• Own and drive functional verification of IPs and subsystems from planning through sign-off.
• Develop verification plans, testbench architecture, and test cases based on design and architecture specifications.
• Build and enhance reusable, scalable verification environments using System Verilog and UVM.
• Develop and maintain constrained-random and directed test scenarios, assertions, and functional coverage models.
• Drive coverage closure (code + functional) and debug failures using waveform/log analysis.
• Collaborate with design, architecture, and SoC integration teams to resolve issues and ensure verification completeness.
• Contribute to regression setup, triage, and maintenance to ensure verification quality and throughput.
• Support IP-to-subsystem-to-SoC integration and reuse of verification collateral across levels.

Required Qualifications

• 3 to 5 years of hands-on experience in ASIC/SoC functional verification.
• Strong proficiency in System Verilog and UVM methodology.
• Proven experience in IP, subsystem, and/or SoC-level verification.
• Solid understanding of verification concepts: constrained-random stimulus, functional coverage, assertions (SVA), and scoreboarding.
• Strong debug skills using simulation logs and waveform tools (e.g., Verdi/FSDB).
• Good understanding of digital design fundamentals, bus protocols, and SoC architecture.
• Strong analytical, problem-solving, and communication skills.

Preferred / Good-to-Have Skills

• Experience in integration of C/C++ models into SV UVM Testbench using SV<->C DPI calls
• Familiarity with formal verification(C2RTL, FPV..) and performance verification.
• Experience with industry-standard bus protocols (AXI/AHB/APB, etc.).

Applicants: Qualcomm is an equal opportunity employer.

If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.