Research Development Engineer

Sunrise Biztech Systems; Hyderabad; On-site; INR 1,500,000 - 2,100,000; Full time

Job summary

Sunrise Biztech Systems Pvt. Ltd. is seeking an experienced Research & Development Engineer for a 12-month contract in Hyderabad. The role focuses on developing cycle-approximate SystemC/TLM2 models and performing SystemVerilog/UVM verification for complex hardware models.

You will build testbenches, analyze results, and optimize performance while working with PCIe and AXI protocols to ensure accurate system-level modeling and alignment with specifications. Immediate availability preferred.

Qualifications

• 5–6 years of relevant experience in R&D engineering.
• Hands-on with SystemC/SystemVerilog/UVM for modeling and verification.
• Experience in testbench development and model validation.

Responsibilities

• Develop cycle-approximate SystemC/TLM2 performance models.
• Perform SystemVerilog/UVM functional and performance verification.
• Develop testbenches for model validation and debugging.
• Analyze simulation results and optimize model performance.
• Work with PCIe and AXI protocols for system-level modeling.
• Validate model accuracy and compliance with specifications.
• Support model integration, debugging, and documentation.

Skills

SystemC

SystemVerilog

UVM

Modeling

Education

Bachelor's degree or higher in ECE/CS/related

Tools

PCIe

AXI

Job description

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our reputed clients for the following position. If you're interested and your experience matches the requirement, we'd love to hear from you.

Position: Research & Development Engineer
Experience: 5-6 years

Location: Hyderabad

Contract :12 Months

Role & responsibilities

• Develop cycle-approximate SystemC/TLM2 performance models.
• Perform SystemVerilog (SV)/UVM functional and performance verification.
• Develop testbenches for model validation and debugging.
• Analyze simulation results and optimize model performance.
• Work with PCIe and AXI protocols for system-level modeling.
• Validate model accuracy and compliance with specifications.
• Support model integration, debugging, and documentation