A leading semiconductor company seeks a Principle DFT Engineer in Pune, India. The candidate will architect DFT designs, oversee verification coverage, and collaborate with various teams to deliver DFT implementations. Required qualifications include a BS/MS in Electrical/Computer Engineering, 10+ years of DFT experience, and expertise with Mentor/Synopsys tools. The role offers opportunities for professional development and online learning.
Qualifications
10+ years of DFT experience in complex designs.
Hands-on expertise with DFT tools.
Solid lab and test floor bring-up experience.
Responsibilities
Define and implement DFT methodologies.
Create test vectors or oversee their creation.
Collaborate with physical design team.
Skills
Mentor/Synopsys test generation tools
DFT techniques (JTAG, ATPG)
Logic diagnosis
Scan compression
Education
BS/MS degree in Electrical/Computer Engineering
Tools
Tessent shell flow
Job description
Principle DFT Engineer page is loaded## Principle DFT Engineerlocations: Punetime type: Full timeposted on: Posted Todayjob requisition id: R-10062708### About the Position: As a Pune MCU team DFT lead, this candidate needs to architect DFT design, in charge of DFT instruments insertion and simulation; work with SOC lead/IP designers and DV team to deliver DFT implementations, verify and review verification coverage; work with BE lead for DFT modes STA, IR drop analysis; work with test engineers to bring up test patterns on silicon; provide guidance to Jr. DFT Engineers.### **Minimum qualifications*** BS/MS degree in Electrical/Computer Engineering with 10+ years of DFT experience* Hands-on expertise with Mentor/Synopsys test generation tools for large complex designs* DFT lead experience for complex SOC TO and Production* Strong fundamental knowledge of DFT techniques include JTAG, ATPG, test pattern translation, yield learning, logic diagnosis, scan compression, IEEE 1500 Standard, and MBIST, LBIST, SSN### **Preferred qualifications*** Experience with synthesis, STA and back-end implementation flows* Familiar with Tessent shell flow for DFT instruments insertion include MBIST, IJTAG, SSN, BSCAN, OCC etc* Solid Lab and test floor bring-up and debug experience* Yield estimation and test optimization* DFT AI mindset### **responsibilities*** Define and implement DFT structure, design and methodologies that include scan/mbist/jtag and functional testing* Create test vectors or oversee their creation* Collaborate with physical design team to close timing in DFT mode* Sign-off DFT requirements are being met* work with testing team to bring-up test patterns on silicon#LI-2734## Bright Minds. Bright Futures.We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.